Electronic Design

Extend The Range Of RS485 Networks

Standard RS485 drivers can be used to implement a collision-based multimaster network much like Ethernet, but at a substantially lower speed and cost. With this circuit, the network's speed can be increased eight-fold.

In a typical setup, the RS485 driver is left tri-stated unless a Space is sent. Resistors pull the network to the resting Mark state. Each station observes the network to make sure that another is not sending before it tries to transmit. However, two stations may observe at the same time that the network is free, and thus attempt to transmit simultaneously.

If more than one station sends simultaneously, the transmitters don't fight each other because only the Space state is driven. The combinations of Spaces being sent at different times garbles the transmission and causes a "collision." Each sender monitors its own transmission to determine whether such a collision has occured. If there's a collision, the stations wait a random length of time and try to transmit again. The random time is usually determined differently for each station, based on the time since the station was turned on. If several collisions occur in a row, the stations wait exponentially longer until the transmission is successful.

The transmission speed of a collision-based RS485 network is limited by the speed at which the network may return to its undriven Mark state. In a large network, the wiring capacitance can be substantial and the network pull-up and pull-down resistors may not be able to return the cable to the undriven state fast enough for reliable transmission.

The circuit depicted in the figure "helps" drive the cable to the Mark state by forcing the network driver on for the first one-tenth of a bit time during a Mark. One-tenth of a bit time is sufficient to force the network back to its resting condition without interfering with collision detection. Although two drivers may be fighting each other during this time, drivers conforming to the RS485 specification are designed to withstand indefinite short circuits to either supply rail.

NAND gate U1A inverts the incoming data and U1C inverts the received data. C1, R1, and Schmitt trigger U1B extend the network enable transceiver for one-tenth of a bit time of a Mark. The values shown support 9600-baud network operation. R2 and R3 should be selected so that the combined resistance of all network nodes is greater than 60 Ω per side.

See the figure

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