Infineon has expanded its wireless memory portfolio with CellularRAM, this is a customised memory solution designed and tailored for mid-range to high-end mobile phone applications. CellularRAM is well positioned to replace current 6T-SRAM in future 2.5G and 3G handsets due to its high-density 1T1C-cell architecture and optimised low power design. CellularRAM has SRAM-pin compatibility, refresh-free operation and exceptionally low power consumption, making it a viable alternative in legacy systems
The emerging 2.5G and 3G wireless standards allow for higher data rates (115kb/s to 384kb/s with GPRS or EDGE) across an air interface, enabling a new set of applications including MP3, multimedia messaging, intelligent organisers and video streaming to run on handsets. However, these new services highlight the limitations of existing memory architectures, such as low-power Flash and SRAM, in wireless handset designs. Traditional asynchronous access mode cannot fulfil the increased demand for bandwidth.
In 2002 Infineon, Micron and Cypress announced an agreement to develop specifications for CellularRAM products collaboratively on which a new, multi-generation family of low-power pseudo-static RAM (PSRAM) could be built. The basic architecture of a single transitor and capacitor makes higher densities and smaller die sizes possible, offering a lower cost:bit ratio than current solutions for 2.5G and 3G handsets. The CellularRAM architecture provides significant advantages over traditional SRAMs and six-transistor (6T) SRAM cells by leveraging the technology and reduced size of a DRAM cell.
CellularRAM is designed for mid-range models, complementing Mobile-RAM (see panel) which addresses the high-end mobile and smartphone market. The mid-range is characterised by moderate density and bandwidth needs, but power efficiency is key. PSRAM or CellularRAM has become the main memory type used in low and mid-range phones and will have a 50% market share in 2005. Low power SDRAM, like Mobile-RAM, are already making their presence felt in the high-end and smartphones sector.
CellularRAM offers customers a smooth migration path to higher density and higher bandwidth memories at about the same low power levels as 6T-SRAMs, while keeping modifications to the system architecture to a minimum. This is achieved by maintaining a similar footprint to SRAM plus compatibility with the Flash/SRAM memory bus interface.
GOING INTO PRODUCTION
Infineon is about to go into production of 32Mb and 16Mb densities and offer CellularRAM in the well-known good die/wafer format to address the industry trend towards Multi-Chip-Package (MCP) solutions. The 16/32-Mb CellularRAMs in VFBGA-48 packages incorporate several low power features and are pin-compatible with SRAMs. They have the same voltage range, package and ball assignment as the asynchronous low power SRAMs currently used in cell phone designs. New PCBs can be designed to enable more performance upgrades by allowing for an additional ball row.
Special low power features like Partial Array Self Refresh (PASR), Temperature Compensated Self Refresh (TCSR) and Deep Power Down (DPD) allow the user to scale dynamically the active (refreshed) memory to meet their needs and to adapt the refresh rate to the actual system environment. This means no power penalty is paid and only portions of the total available memory capacity is used; for example, 8Mb out of 32Mb. The low power features are set by programming the Refresh Control Register (RCR). The user can dynamically customise the memory capacity to suit their needs in normal operation mode and standby mode by applying PASR. The DPD control bit must be set to low to put the device into deep power-down mode. Once set, the current consumption is cut down to less than 10mA.
The CellularRAM can be powered from a single 1.8V power supply feeding the core and output drivers. The CellularRAM can be easily adapted to systems operating in an I/O voltage range from 1.8V to 3.0V by feeding the I/Os with a separate voltage supply.
The chip is fabricated in Infineon Technologies advanced 0.14µm low power process technology.
The CellularRAM in the 54-Ball VFBGA supports low bandwidth, SRAM-like operation as well as high-speed burst mode operation at a maximum frequency of 104MHz.
Either of the following three interface configuration options can be selected via register setting: asynchronous/page SRAM-type mode; NOR-Flash burst mode (sync burst read/async write); and full synchronous burst mode (sync burst read/sync burst write)
The CellularRAM emulates burst Flash read and write operation if configured in the sync burst mode, as is familiar in standard NOR Flash products from vendors including Intel, Sharp, AMD/Fujitsu, Micron and ST. The supported burst frequencies supported by CellularRAM in the 54-Ball VFBGA are 66MHz, 80MHz and 104MHz.
A peak of 208Mb/s can be achieved through burst mode configuration, giving users the performance needed to run bandwidth-hungry applications such as Internet access, MP3, video postcards and so on.
The burst length can be programmed and set to either fixed burst lengths of 4, 8 or 16 words, or to continuous mode. The 16 word burst mode is particularly suited to cached processor designs, to speed up cache refill operations.
Mobile phone system designers have struggled because two different memory devices, fast Flash and slower SRAMs, operating on the same bus do not function efficiently together. CellularRAM memories now offer handset designers a solution for a faster, more efficient and simpler design in a high-throughput memory subsystem compared with the traditional LP-SDRAM approach. CellularRAM memory supports a burst protocol that is fully compatible with low-power Flash, making the memory controller design more straightforward. It also leverages JEDEC-standard, advanced power management for Mobile SDRAM, designed to reduce active and standby current levels. This combination makes CellularRAM memory a useful device for storing and executing code.
The key features of the 16/32Mb CellularRAM memory include: compatible burst protocol with standard burst Flash; refresh-free operation; access time of 70ns (async) at 1.7V; burst clock rates of 66/80/104MHz (208Mb/s peak bandwith); 1.8V I/O and core power supply; and low active (20mA) and standby (90 mA) power. In addition, the CellularRAM has burst write capability plus advanced power management features. It is compatible with JEDEC Mobile SDRAM, all within a 6mm x 8mm 54-VBGA package with a temperature range -25°C to + 85°C.
Different wireless standards usually demand different platform requirements, so there is a variety of memory subsystems and specific memory subsystems to address precise data throughput in relation to clock frequency and power consumption.
The combination of CellularRAM memory and burst Flash is able to balance these factors to satisfy advanced 2.5G and entry-level 3G wireless standards.
As the chipset and processor frequencies increase, it is no longer possible to reduce wait states within asynchronous memory devices which may result in the transition to a burst interface to improve data throughput on a unified memory bus. Analysis of a typical memory subsystem demonstrates that an asynchronous-only interface has a throughput barrier of less than 50Mb/s which means the asynchronous interface cannot handle the increased bandwidth needed in a 2.5G standard. A combination burst Flash and CellularRAM device can allow 132Mb/s with a 66MHz bus frequency, an increase of almost 30%, to more then 208Mb/s, with a burst bus at 104MHz.
Consequently, Infineon believes that CellularRAM is the ideal companion to a low power burst Flash because the combination enables high data throughput while keeping power consumption to a minimum.
The goal of the CellularRAM development was a new memory device optimised for different wireless platforms; async, async page and sync. Compatibility with current asynchronous LPSRAM devices smooths the evolutionary step to next generation mobiles.