Electronic Design

Quad Ethernet 10GBASE-T PHY Targets Top-of-Rack Switches

While 1-Gbit/s Ethernet is everywhere, the 10-Gbit/s version is slowly ramping up now that low-power chip designs have become available. As the data volume continues to increase in data centers, there’s growing pressure to add more 10G capability. That means more switches that can handle 10 Gbits/s but also drop to 1 Gbit/s as needed.

At 10G, switch packaging is critical because of thermal considerations and printed-circuit board (PCB) track lengths. However, switch manufacturers demand as many ports per box as possible. Broadcom is addressing these problems with its 40-nm BCM84848 quad 10GBASE-T CMOS device specifically for switches.

This chip is designed for 48-port Ethernet switches. Thanks to its 23- by 23-mm package, designers can place the chips side by side with at least 5-mm spacing right behind the 48 RJ-45 connectors on the front panel of the 1RU switch box, eliminating the dual rows of chips usually required with larger physical-layer (PHY) packages (see the figure). Also, four 40-Gbit/s quad small form-factor pluggable (QSFP) uplinks can be packaged in a similar box with minimal depth.


The Broadcom BCM84848 quad 10GBSASE-T Ethernet PHY is designed for new 48-port Ethernet switches. The smaller 23- by 23-mm package puts all the PHYs in line behind the RJ-45 connectors on the switch front panel.

The BCM84848 also matches up with the companion Broadcom StrataXGS Trident switch chips. It delivers 50% less power than previous designs. An improved 28-nm design is on the roadmap with similar physical packaging characteristics.

In addition to being able to work with 1000BASE-T and 100BASE-TX versions of Ethernet with auto negotiation, the BCM84848 incorporates Energy efficient Ethernet (EEE) to provide energy savings throughout the network by automatically powering down during periods of inactivity. The device can work over 100-meter CAT6a links with standard four-pair magnetics as well.

On-chip IEEE 1588v2 provides time-stamping circuitry that works with the Layer 2 software to implement low latency timing on the network. Support is also provided for SyncE timing. The IEEE 802.1ae MAC sec capability provides link layer security, especially for service providers that may need it. Interfaces include XFI and SGMII on the MAC side and MDI on the transformer side.

The BCM84848 is sampling with volume production targeted for the first quarter of 2013.

Broadcom Corp.

Hide comments

Comments

  • Allowed HTML tags: <em> <strong> <blockquote> <br> <p>

Plain text

  • No HTML tags allowed.
  • Web page addresses and e-mail addresses turn into links automatically.
  • Lines and paragraphs break automatically.
Publish