When most of us hear the word components, we usually think of discrete components like transistors, resistors, capacitors, inductors, or transformers. While we still use all of these discretes, integrated circuits are the primary components today.
More and more circuitry is being integrated into chips every day, making fewer discretes necessary and making it faster and easier to design communications equipment. Now the chip is the system, thanks to the many communications systems-on-a-chip (SoCs) that are available.
This has changed the way communications equipment is designed. Now, there’s less individual circuit design and more higher-level systems design in block diagram form where the issues are the interfaces and the software.
Designing communications and networking gear today is more about choosing the right IC or ICs, connecting them, and then writing the software to make them work together. Fortunately for designers, there’s a host of communications chips available for new systems today.
Radios on a Chip
Whether they’re a receiver, a transmitter, or a transceiver, most radios are available in a single-chip format. For example, many widely used transceivers target the Wi-Fi 802.11, Bluetooth, and ZigBee 802.15.4 standards.
Radios for the industrial, scientific, and medical (ISM) band are also very common. The ISM band is used for an enormous variety of wireless applications. Manufacturers of ISM band chips and modules are continuing to make it easier for any engineer to add wireless functionality to a design. That trend continues with an interesting mix of innovative new radios on a chip.
One good example is the Austria Microsystems AS3940 (Fig. 1), which is the first fully integrated 2.4-GHz multi-channel frequency shift keying (FSK) transceiver with an integrated link manager for reliable control of star networks with up to eight clients.
The chip boasts low power, data rates from 250 kbits/s up to 2 Mbits/s, and high receive sensitivity (–100 dBm at 250 kbits/s, –92 dBm at 2 Mbits/s). Also, it integrates a digital received signal strength indicator (RSSI), real-time-clock (RTC) and programmable clock output, a Gaussian filter, and a phase locked loop (PLL) and loop filter.
The AS3940 is the first 2.4-GHz transceiver with built-in star network management protocol manager that is royalty-free. It provides an easy to use protocol for self-management of all network functions as well. This high level of integration not only speeds system design, it also decreases the MCU’s workload and ensures robust data transfer (burst and streaming modes) and correct protocol handling.
Furthermore, the AS3940 offers excellent adjacent channel rejection and sensitivity in addition to unique features like battery voltage monitoring, adaptive channel switching, an integrated TX/RX switch, and four separate 256-bit user data buffers.
Other features include programmable output power, efficient power management and power-optimized wakeup modes, battery voltage detection, and adaptive channel switching/support of frequency hopping.
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Its performance and integrated functions suit the AS3940 very for a number of applications, including body area networks (health, fitness), wireless sensor networks, active smart labels, home and building automation, interactive remote controls, and data streaming.
According to Austria Microsystems, the AS3940 enables customers to be RF implementers instead of RF experts. Its high performance and adaptive channel switching features create a reliable wireless system, even in dense Wi-Fi environments.
The AS3940 costs less than $3 in 1000-piece quantities. It is housed in a QFN-32 (5 by 5 mm) package and operates with a 2.2-V power supply from –40°C to 85°C. A demo board is available for evaluation.
Austria Microsystems also has a unique new 27-MHz transceiver for short-range applications. The AS3900 targets applications that need a very low specific absorption rate (SAR), which designates how much RF energy is being absorbed by the human body. The SAR at 27 MHz is far less than it is at 2.4 GHz. Some target uses include medical and sporting goods, industrial automation, and short-range sensor networks.
The AS3900 uses FSK and can send data at up to 212 kbits/s. Its built-in link manager provides a hardwired, royalty-free protocol for self management of a simple star network. No external microcontroller is needed. The chip operates with a small resonant loop antenna, meaning it uses near-field magnetic-field wireless rather than the usual far-field link. Also, it features a simple two-way serial interface and RSSI. The chip comes in a 5- by 5-mm 28-pin quad flat no-lead (QFN) package and sells for $3 in 1000-unit quantities.
Another interesting radio-on-a-chip solution is the KDEC code-hopping receiver (Fig. 2) from Radiometrix, which enables the implementation of secure RF remote control systems. The chip includes a basic antenna that gives the user a complete, ready to use receiver interface that facilities the deployment of a secure RF remote control system.
The Radiometrix remote control system uses an ever-changing 32-bit encrypted hop-code that’s encrypted using 64-bit manufacturer code and a 28-bit serial number for security. The decoder has a standard frequency of 433.92 MHz, though other ISM band frequencies can be ordered on request.
The receiver is optimized for use with the company’s KFX2 key-fob transmitters or KTX2 transmitter modules. If the chip is combined with either of these products, no additional parts are needed to create a wireless system suitable for high-security remote control. The erasable secure learn function allows up to 16 different transmitters to be remembered.
When used with the five-button KFX2 transmitter, it’s not possible to activate more than one output per transmission, and all five of the KDEC’s 250-V, 8-A relay outputs can be individually activated. Alternatively, when used with the KTX2, the KDEC has simple output functionality. New function-codes are fed to the relays as they are received. For both versions, momentary/latched relay action is also selected by means of a jumper link on the printed circuit board (PCB). LED-based visual indicators show which relays are in operation.
The receiver is powered by a 9- to 16-V dc supply. It suits applications such as security/alarm systems, status reporting/monitoring secure systems, industrial controls, HVAC controls, wireless door entry systems, and simple on/off switching mechanisms.
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Operating in the 900-MHz ISM band, the RF Monolithics DNT90 is a low-cost, long-range, multi-purpose OEM RF module suitable for a wide variety of cost-sensitive applications including wireless sensor networking, telemetry, and control applications. It is a complete plug-and-play module—just add the antenna.
The module features the reliability and robustness of frequency-hopping spread-spectrum (FHSS) at a single-unit price of $29. It features a 100-kbit/s data rate with RF power of +22 dBm (150 mW) coupled with excellent receive sensitivity of –99 dBm to provide exceptional range and performance. Also, it’s fully certified for wireless applications by the Federal Communications Commission in the U.S. and by Industry Canada.
The DNT90 uses frequency-hopping technology with a unique TDMA/CSMA hybrid multiple access scheme that ensures low latency to yet a virtually unlimited number of nodes in a single network. Point-to-point and multipoint networks are supported as well as peer-to-peer and store-and-forward repeating. Available in pinned and surface-mount versions, the DNT90 footprint and pinout are the same as RFM’s 2.4-GHz LPR2430ER, allowing OEMs to create both 900-MHz and 2.4-GHz products on a single hardware platform.
The DNT90’s store-and-forward repeating feature can extend the already substantial range of the 900-MHz module without the need for dedicated routing nodes. Plus, at a full 150 mW of RF power, the module provides more than twice the power of competing modules to deliver exceptional range.
The DNT90 supports wireless applications that need to send over-the-air analog and digital data and/or serial data. The module offers three analog inputs and six general-purpose I/Os (GPIOs) to not only report signal status but also to initiate actions without the need for additional intelligence.
With a standard UART serial port supporting standard baud rates in addition to the analog and digital I/O, the DNT90 is well-suited for any sensor application. Its ability to auto-report sensor data and to sleep in between reports makes it suitable for battery operation. Its 128-bit AES encryption provides protection for highly sensitive application data.
RFM’s DNT90DK developer kit helps design engineers fast-track their designs. It’s now available from RFM distributors Avnet, Digi-Key, Mouser Electronics, and Nu Horizons with a suggested retail price of $199.
Femtocell on a Chip
Another good instance of putting a system on a chip is picoChip’s new femtocell IC and reference design. The PC333 is the full baseband portion of a femtocell. The radio transceiver is a separate chip.
The PC333 is the first chip designed to extend the femtocell into public access infrastructure such as metro femto, rural femto, and strand-mounted systems. It supports 32 channels (scalable to 64) for simultaneous voice and HSPA+ data. Also, it’s the first chip to support multiple-input multiple-output (MIMO), the first to support soft-handover, and the first to conform to the Local Area Basestation (LABS) standard.
The chip enables small basestations for urban hotspots and city centers as well as public access to be made and deployed at a cost far lower than traditional approaches, radically changing the economics of network infrastructure.
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The PC333 (Fig. 3 ) integrates most of a complete 3GPP Release 8 Local Area 42-Mbits/s HSPA+ basestation onto a single chip. LABS is the 3GPP definition for systems with higher performance than home basestations, allowing higher-capacity, 120-km/h mobility and +24-dBm output power for greater than 2-km range.
Additionally, the PC333 extends the parameters of femtocell performance to levels that would traditionally have been considered picocell or even microcell. This high performance coupled with zero-touch provisioning means carriers can routinely deploy femtocells as part of their wide-area network rollouts. Femtocells are showing up in rural and metropolitan-area basestations as the PC333 redefines the way femtocells are used and networks themselves are designed.
While residential femtocell applications have been the initial focus of the market, the PC333 will have a major impact on the way carriers and vendors operate. Until now, an HSPA-capable basestation with 32- or 64-channel Release 8 LABS specification would have been called a microcell—a market segment that’s largely been ignored by most major 3G basestation vendors. Supporting this type of infrastructure development, picoChip’s PC333 could shake up the 3GPP radio access network (RAN), helping to extend the life of 3G as Long-Term Evolution (LTE) matures.
The PC333 manages 32 channels and two devices can be cascaded to make a 64-channel system, while its smartSignaling technology enables it to support a dramatically larger number of connected smart phones. It runs on a 700-MHz ARM chip with TrustZone and a variety of specialized hardware features for security. As well as LABS conformance and release 8 HSPA+ (42 Mbits/s downlink, 11 Mbits/s uplink), the PC333 supports soft handover, receive diversity, and MIMO.
The device is part of picoChip’s complete range of devices for femtocell access points, from the low-cost PC302 used for residential systems to the PC312 and PC313 for secure mobile environments (SMEs) and high-end consumers and the enterprise-grade PC323. Samples to lead customers will be available in the fourth quarter of 2010.
The company also recently launched its PC7300, a complete femtocell hardware reference design that combines low system costs and power consumption with the fastest possible time-to-market. Based on the field-proven PC3xx picoXcell family of femtocell devices, the PC7300 cuts bill of materials (BOM) costs to under $50 and requires less than 5 W total power, making it the only femtocell solution on the market today that can be integrated into gateway devices.
The PC7300 is optimized for high-volume ODM production. It integrates all of the hardware required to implement a four- or eight-user residential femtocell, from antenna to backhaul. It includes the PCB and associated schematics and layout, populated with a picoXcell programmable baseband processor, memory, RF circuitry, and passive components. The board includes an external media independent interface (MII)/Ethernet interface and optionally features software GPS, integrated network time protocol (NTP), and a software user services identity module (USIM).
As the industry’s leading supplier of femtocell technology and silicon, picoChip has been shipping to multiple carriers in high volume for the last several years. In June, it passed the milestone of 1 million chips shipped. Femtocells have taken years to develop and deploy, but 2009 and 2010 saw rollouts.
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Sprint has had femtocells since 2007. Verizon launched its service in 2009. AT&T has also had femtocells since 2009 but extended its service this year. Other carriers around the world such as Vodafone and KDDI have also launched this year. Subscribers with poor or unreliable cellular service or slow 3G data services are finding that a femtocell really solves the problem. The new chip and reference design from picoChip promise to make femtocells even better and more widely deployed.
Analysts say the global femtocell market is growing rapidly and predict this growth to continue. For example, Dell’Oro recently forecast that revenues from femtocell deployments worldwide will generate $4 billion by 2014. Shipments should reach 62 million in 2014, the firm said, and more than 80% of the femtocells shipped will be WCDMA. According to the Femto Forum, 17 operators have deployed femtocells, with a further five committed to future launches, bringing the total to 22.
Broadband Modems on a Chip
What Internet service providers really want in a modem on a chip is lower IC cost, decreased power consumption, and extended reach. All of these benefits are available with Lantiq’s latest broadband ICs. Its VINAX V3 chipset brings VDSL2, ADSL2, and ADSL2+ to carrier equipment. The GRX processor delivers extra computing horsepower to consumer premise equipment (CPE) for fiber to the home (FTTH), and the WAVE300 chip delivers extra range and speed in the home wireless local-area network (LAN).
Lantiq is a private equity company spun off from Infineon in late 2009. Its chip strategy is to deliver and manage broadband connections from the carrier right to the point of use in digital homes. This includes a view of the networked home as a mesh (or “mash”) of wired and wireless connections to support computing devices, tablets/smart phones, and HDTV. Lanitq’s recent announcements for new ICs fulfill this strategy.
The VINAX V3 is a “universal” chipset for xDSL line card applications aimed at what is now a “volume” market for xDSL line cards. It allows equipment OEMs and carriers to use a common platform to deploy either ADSL2/2+ or VDSL2 (upgradable via software). Transmission across all of the International Telecommunications Union (ITU) standard profiles and modes drives economies of scale and flexibility for the carrier.
In VDSL2 operations, the chipset’s features translate to energy efficiency, optimization of reach/bandwidth for different installation scenarios, and remote line management/maintenance. As for efficiency, the maximum power consumption is only 0.9 W/port in 17-MHz VDSL2 (50 to 100 Mbits/s) operation. Reach and bandwidth are expanded by including support for channel bonding (two cable pairs per line). This doubles the reach and leverages the typical U.S. copper wire infrastructure profile (approximately 80% of homes reached with two cable pairs).
Vectoring, a technology expected to be used by carriers beginning in 2011, involves optimization of all pairs in a wire bundle to minimize crosstalk. Compared to the current method of trying to achieve the best performance of a single pair, vectoring doubles bandwidth at distances up to 500 m.
Finally, the chipset includes line management and maintenance. Class 5 switches that traditionally used plain-old telephone service (POTS) voice line bandwidth (3.4 KHz) for line testing now require substitute techniques such as the ITU G.996.2 line test standard, which defines embedded singed-ended (SELT), dual-ended (DELT), and metallic (MELT) line testing parameters and reference models for DSL networks.
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Lantiq’s GRX series of home gateway processors represents the company’s successor to the VRX single-chip xDSL gateway. These devices integrate a Gigabit Switch fabric and 802.3az-compliant Ethernet physical layers (PHYs) that are configurable as two Gigabit or four Fast Ethernet ports.
The GRX chips strip away the xDSL-specific PHY/media access controller (MAC) to support non-xDSL gateway applications using the same software code base. The series also meets the Gigabit processing requirements of cable’s DOCSIS 3.0, VDSL2, and any passive optical network (PON) access technologies.
System development with the GRX series is accelerated with a Linux distribution and software platform. This includes all standard applications software (network, voice, diagnostics, and device management) and drivers for all related Lantiq gateway chips such as DECT/CatIQ, voice over Internet protocol (VoIP), and wireless LAN (WLAN). The most powerful version of the series, the GRX288, achieves a routing throughput up to 2 Gbits/s.
The WAVE300 802.11n chipset (Fig. 4) targets video transmission. This chip is by way of Lantiq’s acquisition of Metalink, an Israeli startup focused on developing 802.11n transmission of HD video streams. The WAVE300 is the first 802.11n product to implement beamforming, which uses multiple antennas to generate spatial streams and direct energy to the location of the desired receiving station.
Beamforming has not been used in any commercial WLAN products to date, as it is an extremely complex technology. Air channels within the home continuously change as doors open and close and people move about. Beamforming has to accommodate these changes and maintain an excellent focus on the right spot where the station is located, which requires quick adaptations. For video, the adaptation has to be performed per packet.
Lantiq’s beamforming technique exceeds expectations, as it also improves reach to stations that are not themselves equipped with beamforming technology by use of maximum-likelihood and other techniques on the receiver side.
The system architecture intelligently offloads the main processor with a second “Thick MAC” that executes all real-time and processor-intensive operations and frees performance for other applications and services. In the maximum 3x3 MIMO device, data rates up to 200-Mbit/s net throughput are achieved on single-band implementation. Dual-mode-capable chips in the family reach up to 270-Mbit/s net throughput in concurrent-mode operation.
Lantiq provides several software and pin-compatible versions of the WAVE300 for various applications, from low-cost standard WLAN 11n 2x2 products to video-grade WLAN. Fully compliant with IEEE 802.11n, it addresses ADSL/VDSL routers, gateways and integrated access devices (IADs), Gigabit-WLAN routers, video-bridges, set-top boxes, and digital TV applications.
With its versatile interface, the Lantiq 11n solution can be connected to any host processor with a PCI, mPCI, or PCI Express interface. The WAVE300 (baseband/MAC and HF part) is available in single-band 2.4-GHz and 5-GHz variants and a dual-band device.
Networks on a Chip
The networking segment of communications is one area where more and more is packaged on a chip each year. With digital CMOS in 65- and 90-nm geometries, it is possible to cram most of a networking line card on a chip these days.
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One good example is the Centec Networks CTC6048 (Fig. 5), which is designed for next-generation Metro/Carrier Ethernet networks. The CTC6048 is an advanced packet-processing chip that includes a second-generation IP/Ethernet switching processor that integrates a Layer 2 through Layer 4 packet-processing engine, advanced traffic manager, and fabric interface.
The chip targets fixed and modular systems used in access, edge, and aggregation IP/Ethernet routing switches, packet transport network (PTN) platforms, optical line termination (OLT) systems, and wireless backhaul gateways. Integrated memory reduces system cost, and the device performs consistent distributed processing for both unicast and multicast packets.
The CTC6048 incorporates a variety of advanced features for implementing carrier-class transport, including on-chip Ethernet operation, administration, and management (OAM) based on IEEE802.1ag and ITU-T Y.1731; less than 50 ms of automatic protection switching (APS) based on ITU-T G.8031/8032; synchronous Ethernet and packet timing protocols such as IEEE1588v2, network time protocol (NTPv4); and multiprotocol label switching-transport profile (MPLS-TP) and provider backbone bridge traffic engineering (PBB/PBB-TE) technology.
The chip’s patented loopback mechanisms ensure NPU-like packet-processing flexibility, while its muxiplexing/demultiplexing technology provides the ability to scale to 256 full-service network ports per chip. Scalability is further improved through the use of configurable internal and external table sizes and the built-in fabric interface to connect to Centec’s CTC8032 switch fabric in a distributed chassis system with total capacity of 5.12 terabits. A single device can be configured into different form factors such as 48x1GE+4x10GE, 8x10GE, and 48x2.5G to further reduce inventory management cost.
Centec’s CTC6048 processor supports a combination of hardware-based IPv4 and IPv6 dual-stack routing, MPLS switching, and various types of advanced multicast and IP/MPLS tunneling protocols including IPv4, IPv6, generating routing encapsulation (GRE), user datagram protocol (UDP), MPLS, and provider backbone transport (PBT). Also included is support for L2/L3 virtual private networks (VPNs) and native high-performance multicast.
The CTC6048 also supports service-based access control list (ACL), plus full, hierarchy quality of service (H-QoS) policing and queuing/scheduling/shaping, built-in OAM and accounting, and carrier-class reliability using APS, fast convergence, and CPU protection. Bandwidth provisioning functions are supported through the use of an advanced flow classifier and a highly flexible 80-Gbit/s fabric interface. Capabilities are further extended through the use of optional interfaces to external memory.
The CTC6048 packet processor is sampling now, with volume production scheduled for the first quarter of 2011. The device is packaged in a 1520-pin flip-chip ball-grid array (PBGA) and priced at $250 in 10,000-piece quantities. A complete reference design is available, including a 1U box with 48 Gigabit Ethernet ports, or the equivalent of 32 1000BaseT ports and 16 small form-factor pluggable (SFP) ports, plus eight 10-Gigabit small form-factor pluggable (XFP) ports.
Also included are built-in 20-Mbit ternary content addressable memory (TCAM) and 18-Mbit static random access memory (SRAM) for table expansion. All of these advanced features are available on the reference design. The box can be also used as a line card in the chassis system with a specially built backplane.
With Ethernet becoming ubiquitous in carrier networks as the market shifts toward converged triple-play voice, video, and data services over Ethernet transport mechanisms, the CTC6048 is sure to find a place.