The HD74CDC2509A and HD74CDC2510A PLL clock distribution devices ensure that the clock signals to memory devices and other chips within PC-100 SDRAM DIMMs have the precise timing essential for reliable data access and data storage at 100 MHz clock speeds. The chips can facilitate the industry's transition to faster processors such as Intel's Pentium II Deschutes MPU. These PLLs meet the ±100-ps jitter specification required on PC-100-registered SDRAM DIMMs and support the spread-spectrum clock synthesizers used on registered DIMMs. Outputs are LVTTL for ease of interfacing.
Company: HITACHI SEMICONDUCTOR AMERICA INC.
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