Many circuit topologies have been devised to sense capacitance changes. Proximity sensors, "touch" switches, and a number of other transducers depend upon such circuits. Because some of these applications involve the detection of relatively small capacitance changes, the sensing circuits needed to implement them usually involve precision analog techniques and considerable complexity.
With this simple circuit, high precision and stability can be achieved when measuring capacitance in the range of picofarads and up (see the figure). This is accomplished by exploiting the so-called "metastable" behavior of a "mistreated" flip-flop. As is common knowledge, it's considered "mean" to simultaneously assert both Set and Reset inputs of a flip-flop because no self-respecting binary device can respond with dignity to a command to be simultaneously on and off. In fact, what happens to a real device when subjected to this input combination can only be found in the fine print of its data sheet.
In the diagram, FF1 is a typical monolithic D-type flip-flop; it has Direct Set (pin 6) and Direct Reset (pin 4) inputs. In the case of the 4013, the flip-flop enters a "metastable" state, in which both Q and -Q outputs are high.
This is clearly an unsatisfactory predicament for a bistable element. It's interesting to note that this condition will persist only until one or the other of the Direct inputs is deasserted. The device then sorts itself out into one of its stable states as quickly as internal delays will permit. It takes just tens of nanoseconds even for a slow metal-gate CMOS device like the 4013.
The capacitance sensor circuit takes advantage of this behavior by driving both Direct inputs from a single source through RC delay circuits that are identical except for the capacitances that will be compared. As a result, when the clock signal falls, the fall of the Direct Set signal at pin 6 will lead or lag the fall of the Direct Reset at pin 4 since CX is (even ever so slightly) smaller or larger than CREF .
Because both Direct inputs are sensed by elements of the same monolithic device, it's expected that the voltage threshold levels and propagation delays of the inputs will match and track closely against temperature and supply variations. Thus, very small capacitance changes can be accurately and reliably detected.
Delving deeper into the circuit, a measurement cycle begins with the low to high transition of the clock input. This charges CREF and CX through R2 and R1. FF1 is thus driven to its metastable state.
When the clock goes low, both capacitors begin to discharge. The first to cross the 1/0 threshold is accurately detected by the flip-flop. Consequently, FF1 ends up in the "1" state if CREF > CX, or in "0" if CREF < CX. Trimmer potentiometer P, which is an optional part, can be used to adjust the threshold capacitance in critical applications.
At the end of the measurement cycle, the clock returns high. This causes FF2 to capture FF1's final state and continuously output it until the next cycle is completed.
The clock source is noncritical. The waveform should be roughly symmetrical at CMOS drive levels, and have a period four or more times greater than the RC time constants of the capacitance measuring circuits. If no suitable clock signal is available in the system in which the sensor is used, a simple multivibrator circuit like the one illustrated is entirely adequate to maintain the accuracy and stability of the sensor.
In the figure, the capacitance comparator is used in a humidity monitoring/control context. CX is a Philips capacitive humidity sensor that displays a roughly +0.4-pF capacitance change per 1% increase in relative humidity. Nominal total capacitance is 122pF at 43% relative humidity. To maintain a set-point stability of 1% relative humidity (exclusive of transducer variation), the capacitance measuring circuit must display a stability of 0.4/122 = 0.33%. This level of stability is easily achieved by the circuit. C1 blocks any dc component from polarizing the humidity sensor.