Electronic Design

Lossless DC Overcurrent Sensor Uses Saturable Reactor

To sense high dc currents, designers typically use shunt resistors or Hall-Effect-based current sensors. But shunt resistors are plagued by Joule (I2R) losses and the need to open the circuit where they must be inserted. And Hall-Effect-based current sensors are expensive. However, a saturable-reactor-based (or magnetic-amplifier-based) current sensor can overcome these limitations. Consequently, it's an attractive solution for low-cost, high-efficiency dc current-monitoring applications where opening a circuit is impossible.

The key element of the circuit shown is its unilateral saturable reactor: When a dc current (IDC) flows through its "control winding" (made of NDC = 1 turn wound on the central leg of the ferrite core), the flux produced is split into two identical fluxes in the outer legs. Consequently, the two outer legs are magnetized at the same level. A second winding called the "ac load winding" (having NAC = 2 × 30 turns) is also split into two identical serially connected half windings placed on the two outer legs.

With such an arrangement, the self-inductance of the "ac load winding" ranges from a maximum value when IDC = 0, to a minimum value when IDC shifts the working point in the saturation zone of the magnetic circuit. Consequently, the saturable reactor or magnetic amplifier acts as a dc-current-to-self-inductance converter.

The two ac load windings are serially connected so that the fluxes produce flow in the same direction in the circumference of the core, and in opposite directions in the central leg. Hence, these two fluxes are cancelled out in the central leg. The reverse transformer action is suppressed. Therefore, the saturable reactor is unilateral.

The size of the E core can be determined if we assume that for typical ferrite materials, the magneto motive force necessary to reach saturation (HMAX) is close to 200 A/m. If IDCmax is the maximum dc current to be sensed, applying Ampere's theorem yields an effective length (le) of:

le = (nDC × IDCmax)/HMAX (1)

Our goal was to detect dc currents ranging from 1 to 10 A. Applying Equation 1 for IDCmax = 10 A yields: le 50 mm. So, we selected an ungapped EFD25 core having an effective length: le = 57 mm (material grade 3F3, manufactured by Philips).

As the "saturable reactor" realizes only a dc-current-to-self-inductance conversion, some additional signal processing is mandatory to digitally convert the desired dc current. A two step process is used to do this:

1. The self-inductance variation is converted to a frequency deviation.

2. The frequency deviation is compared to a reference frequency with a digital phase/frequency comparator that produces the desired "overcurrent" information in a digital form.

To perform the first step, the ac load windings of the saturable reactor constitute the self-inductance of a Colpitts oscillator. In the figure, this Colpitts oscillator is realized with one unbuffered CMOS inverter (IC11) associated with the tank circuit, which consists of the two feedback capacitors (C = 22 nF) and the ac load windings coils. With this arrangement, the output frequency (fC) is given by:

DB2062eq2

For a dc current ranging from 0 to 10 A, the self-inductance of the ac load windings vary from 2.3 to 0.75 mH, yielding an oscillation frequency ranging from 31 to 55 kHz, respectively.

To realize the second step, the frequency of the Colpitts oscillator is compared to the frequency of the reference oscillator containing the CMOS PLL's (IC2's) digital phase/frequency comparator. The reference frequency is produced by the CD4046B's internal VCO. It can be adjusted between 31 and 56 kHz with the trimmer T = 4.7 kΩ. Depending on the trimmer setting, the output of the digital phase/frequency comparator (Over Current Out) goes high when the dc current to be monitored (IDC) exceeds a limit adjustable from 1 to 10 A.

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