In high-performance semiconductors, the back-end-of-line (BEOL) interconnect pitch has been shrinking for decades following Moore’s law. Steady advances in very-large-scale integration (VLSI) technology for both digital and analog devices could never have been achieved without overcoming various reliability risks in IC chips as well as packages...
Register or Sign in below to download the full article in .PDF format, including high resolution graphics and schematics wh
Register to view the full article
By registering on Electronic Design now, you'll not only gain access to premium content, you'll also become part of an exclusive, robust global engineering community!
Participate in Expert and Reader driven Q&A's
Start your own conversation by commenting on any article or blog
Download high-quality content including the highly anticipated Salary & Career Report