How do die shrinks affect NAND reliability as capacity increases?
Smaller lithography leads to higher densities, smaller die, and lower costs. A consequence of this shrinking is that the amount of charge stored per memory cell is decreasing. This is leading to an increase in the number of bit errors and a decrease in data retention time. A common approach to solving these issues has been to use stronger error code correction (ECC), which historically the host controller or processor has performed. There are essentially two approaches to accessing NAND flash memory.