System designers are willing to try new ASIC business models that take advantage of advanced technology, but they still want to keep costs down, according to a survey by Gartner Dataquest. Also, designers are placing more importance on ASIC suppliers' technology roadmaps as designs move to 90-nm technology. System-in-a-package (SIP) and DRAM ASICs will become mainstream technologies in the next two to five years as well.
Written by Bryan Lewis and Serena Hsu, "System Design Survey: ASIC Highlights" cites several notable trends. First, close to 10% of the respondents are incorporating cell-based IC designs in an SIP. Next, design services are increasing in popularity in local markets, especially in the Asia/Pacific area. Processor cores, such as the PowerPC, are increasingly used in ASICs and FPGAs. And, the SPI-4.1 and SPI-4.2 standard interfaces are in hot competition with RapidIO and XAUI.
For the second consecutive year, a supplier's good integration with third-party tools led the factors for choosing an ASIC vendor (see the figure). This wasn't a surprise, but the report said the rise in the importance of suppliers' having a leading-edge technology roadmap was very interesting.
"Users are evaluating suppliers on estimated timing and features of their 0.65-µm ASIC offering," the authors said. "Power consumption, in the form of leakage current, is a difficult problem to deal with, and users want to know how suppliers will deal with this critical issue."
The report concluded, "Designers stated they will use advanced technology, but only if it is cost-effective. Cost will remain of top importance, but the electronics industry runs in cycles, and emphasis will oscillate between controlling costs and utilizing more advanced technology."