Electronic Design
Clock Generator Specs 0.36-ps Jitter

Clock Generator Specs 0.36-ps Jitter

Accepting signal from a low-frequency crystal resonator or reference clock, the MAX3625B three-output clock generator exploits a VCO and PLL architecture to achieve a jitter of 0.36 ps RMS. With a -57-dBc PSNR, the device minimizes jitter degradation while eliminating the need for a crystal oscillator and fanout buffer. Its three LVPECL outputs operate at frequencies up to 320 MHz from two programmable output-divider banks. In a 24-pin, 7.8 mm x 4.4 mm TSSOP, price starts at $7.35 each/1,000. MAXIM INTEGRATED PRODUCTS, Sunnyvale, CA. (800) 998-8800.
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