Electronic Design
The coppercopper CuCu bonding technology will influence manufacturers who make ICs like the ones seen above pictured on a silicon wafer Image courtesy of the ESA

The copper-copper (Cu-Cu) bonding technology will influence manufacturers who make ICs, like the ones seen above, pictured on a silicon wafer. (Image courtesy of the ESA)

Copper Bonding Technology Reduces Pitch for 3D Chipsets

Demands for increased functionality in ever-smaller IC packages necessitate advances in bonding techniques to build memory stacks and other integrated circuits. Along these lines, the recently formed CoW Consortium will focus on enhancing a chip-on-wafer (CoW) bonding technique via copper-copper (Cu-Cu) diffusion bonding technology in an effort to develop commercially viable 3D chipsets. The consortium, founded by A*STAR’s Institute of Microelectronics (IME), includes members such as ON Semiconductor, KLA-Tencor, Panasonic Factory Solutions Asia Pacific (Panasonic), Singapore Epson Industrial Pte Ltd. (Plating Division), Tera Probe Inc, and Tokyo Electron Ltd.

The new Cu-Cu diffusion bonding involves the diffusion of copper atoms to form a metallic bond, eliminating the solder-assisted process. Members of the consortium successfully demonstrated the technology at 200°C and at a reduced pitch (an average of 40 µm to 10 µm, with researchers aiming to get it down to 6 µm). Thus, chip device manufacturers now have the potential to further integrate their 3D chipsets with CMOS image sensors, signal processors, logic and memory, and memory stacks.

Conventional CoW bonding techniques have relied on a solder-assisted thermo-compression bonding process that can last more than 15 seconds at 300°C. This method, which attaches the chip to a piece of semiconductor wafer, slows the overall production process and results in higher manufacturing costs. Other limitations also exist, including the inability to scale down the pitch, and the distance between wirings.

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