On its own critical-area analysis (CAA) is a key indicator of IC yield; it determines the areas of a given design that are most likely to spawn circuit failures. But a link from critical-area analysis back to implementation is even more valuable. To that end, Ponte Solutions has forged an interface between its YA System for critical-area analysis and Cadence’s Virtuoso custom design platform that lets designers efficiently perform CAA and repair during layout.
Developed under the auspices of the Cadence Connections Program, the interface allows IP designers to address CAA in an actionable manner during the creation of IP elements, standard cells, and memories. As CAA is both statistical and contextual in nature it has been difficult for designers to take specific measurable actions to reduce CAA issues. The current release of Ponte's YA System addresses this problem by presenting the designer with prioritized CAA hot spots, which will ensure the most critical CAA effects as predicted by certified defect kits provided by the leading foundries, are identified and corrected. By interfacing to the Cadence Virtuoso platform via OpenAccess, Ponte's YA System can be used to analyze and correct CAA issues during design.
A free white paper titled, “Using CAA for DFM Optimization of Standard Cells” is available on Ponte Solutions’ Web site.