Electronic Design UPDATE: February 25, 2004

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Electronic Design UPDATE e-Newsletter
Electronic Design Magazine 
PlanetEE ==> www.planetee.com
Febuary 25, 2004
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Today's Table Of Contents:
1. Editor's View
  * Enhanced Processors Promise Stellar System Performance
2. Focus On Test & Measurement
  * Integrated Solution Combines Boundary Scan With Fying Probes
3. News From The Editors
  * Ethernet Links USB Devices
  * Development Board Puts SH-4 Into CELF Arena
  * Steady, Moderate Growth For Merchant DSP Boards
4. Upcoming Industry Events
  * Nanotech 2004
  * Embedded Systems Conference
  * International Symposium on Physical Design
5. Magazine Highlights: February 16, 2004
  * Cover Story: Engineering Feature -- Designers Pick EDA Favorites: 
    Tools To Get It Right -- Fast!
  * Leapfrog: Industry First -- Integrated Digital POL Power-Management 
    System Simplifies Design, Cuts Costs
  * Technology Report: 64-Bit Processors Promise Power-Packed Solutions
  * Design View / Design Solution -- It Takes A Super Sleuth To Really 
    Debug Clock-Timing Problems
  
Electronic Design UPDATE edited by John Novellino

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1. Editor's View -- Exclusive to Electronic Design UPDATE
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Enhanced Processors Promise Stellar System Performance

By David Bursky, Digital ICs/DSP Editor

The future of the server, the desktop PC, and the mobile computer is 
very rosy, going by presentations at the recent Intel Developer Forum in 
San Francisco. Behind the next generation of top performing systems is a 
horde of higher-performance Xeon, Itanium, and Pentium 4 processors and 
motherboard chip sets, as well as new bus and wireless interfaces for 
faster data transfers.
   Intel will continue to enhance its well established Xeon CPU family 
with faster and higher-integration implementations, including new 
instructions that add 64-bit addressing. Forthcoming Xeon platforms 
also will sport high-speed PCI Express interfaces, support for DDR2 
memories, faster CPU and front-side buses, improved power-management 
capabilities, and 13 new streaming single-instruction/multiple-data 
(SIMD) instructions (SSE3 instructions) to improve thread 
synchronization and media and gaming applications.
   The latest versions of the Xeon incorporate the NetBurst 
microarchitecture, HyperThreading, and an integrated three-level 
cache architecture. NetBurst allows the Xeon to support 
multiprocessor systems with clock speeds of 2.8 GHz today and still 
faster systems later this year. Current level 3 caches of 2 Mbytes 
will be increased as well, improving overall system performance. At 
the high end of the server market, Itanium 2-based systems are 
rolling out from over 50 suppliers, and faster versions of the CPU 
are slated for release this year and next. 
   In the desktop arena, the Pentium 4 is on the fast track with the 
recent release of 3.2-GHz implementations that include HyperTheading 
and larger caches (double that of previous versions). Additional 
technologies disclosed last fall are now being implemented on the 
next-generation CPUs. For instance, the La Grande technology enhances 
secure computing, and the Vanderpool technology increases system 
reliability, flexibility, and responsiveness. Still other 
technologies will improve the processing of digital media content, 
packet processing for communications, runtime performance for faster 
execution, and data mining and synthesis applications. Starting in 
the second quarter, Intel will introduce 64-bit memory extensions to 
the IA-32 architecture. At previous forums, the company had announced 
plans to include support for PCI Express, DDR2 memory, SSE3 
instructions, and enhanced power management as well. 
   Based around its Pentium M processor, the Centrino mobile platform 
will see enhancements over the forthcoming months. A 
higher-peformance CPU, codenamed Dothan, is due out next quarter. In 
the second half, the company plans to release the Sonoma reference 
platform system. Sonoma includes a Pentium M processor with a faster, 
533-MHz front-side bus, a new Wi-Fi component that supports 
802.11a/b/g wireless network standards, and a new chip set, codenamed 
Alviso. The Alviso chip set features enhanced graphics support and 
will enable support for devices and standards such as the Direct 
Media Interface, TV-out, high-definition audio, eight USB ports, a 
four-port PCI Express interface, and addressing of up to 2 Gbytes of 
DDR2 memory.
   Part of the new platform implements the Mobile Platform Vision Guide 
feature set, which includes an extended mobile access capability. 
This feature employs a secondary display incorporated in the lid of 
the laptop so that even when the laptop is closed, the user has menu 
access to e-mail and other information, as well as the ability to use 
the mobile system as an Internet-protocol-based telephone. 
   Many other developments unveiled at the IDF will contribute to 
advances in various platforms as well as to the ability to manage the 
systems in the enterprise. For example, Version 2.0 of the 
intelligent platform management interface, released at the forum, 
will help lower the overall costs of server management by allowing IT 
managers to receive status alerts, send instructions to 
industry-standard servers, and run diagnostics over a network (versus 
locally at the server). It also enhances security, remote access, and 
remote configuration capabilities.
   Intel also is supporting the new WirelessUSB initiative based on 
ultra-wideband (UWB) technology. The WirelessUSB specification, now 
in definition, will target a bandwidth of 480 Mbits/s over a distance 
of less then 10 m using a mutiband OFDM transmission scheme. The 
specification will be based on UWB radio efforts by the MultiBand 
OFDM Alliance and the WiMedia Alliance, which are both open industry 
associations.
   For more about the forum, go to http://lists.planetee.com/cgi-bin3/DM/y/eekv0DJhUf0EmQ0BFpG0Ai

To comment on this Editor's View, go to Reader Comments at the foot of 
the Web page:

Electronic Design UPDATE ==> 
http://lists.planetee.com/cgi-bin3/DM/y/eekv0DJhUf0EmQ0BFpH0Aj

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2. Focus On Test & Measurement
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***Integrated Solution Combines Boundary Scan With Fying Probes 
The Symphony APT-9000 is an advanced boundary-scan integration solution 
for Takaya's Series 9000 flying probe testers. As such, it tightly 
integrates the advantages of the two complementary technologies. In 
addition to applying boundary scan to the target board via the fixed 
probes, Symphony APT-9000 uses the flying probes under dynamic control 
of the boundary-scan test. The combination offers excellent fault 
coverage on complex analog and digital circuit boards. It's designed to 
maximize testability even on difficult-to-access digital nets, as well 
as for portions of a board that are not boundary-scan compatible. 
Boundary-scan test development is performed offline, freeing up 
production equipment for maximum factory throughput. The Symphony 
APT-9000 is available immediately for under $25,000.
      JTAG Technologies ==> http://lists.planetee.com/cgi-bin3/DM/y/eekv0DJhUf0EmQ0BFpI0Ak
 
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3. News -- From The Editors
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***Ethernet Links USB Devices
Keyspan's USB Device Server links remote USB devices to an 
Ethernet-based host. It thus provides a way to connect an embedded host 
to USB devices that must be farther away than a standard USB connection 
allows. The unit also enables multiple hosts to control the remote USB 
devices. The server supports four USB ports at Full-Speed USB (12 
Mbits/s) via a 10/100 Ethernet interface. The server supports static IP, 
DHCP, and Apple's Rendezvous address assignment. Host operating systems 
include Windows 2000, Windows XP, and Mac OS X version 10.2.8 or higher. 
The USB Device driver costs $129.
     Keyspan ==> http://lists.planetee.com/cgi-bin3/DM/y/eekv0DJhUf0EmQ0BFpJ0Al

***Development Board Puts SH-4 Into CELF Arena
The RTS7751R2D development board is designed to support the Consumer 
Electronics Linux Forum (CELF) specification. The board incorporates an 
SH7751R processor, which is built on the 32-bit SuperH SH-4 RISC core, 
plus a floating-point unit, a PCI controller, and a PCMCIA controller. 
The board includes support for AC'97, a video overlay display, alpha 
blending, a ZV port video input, an LCD/CRT display controller, and a 
USB (Host). The board will support the Linux 2.6 kernel. Lineo Solutions 
provides Linux customization.
     Renesas ==> http://lists.planetee.com/cgi-bin3/DM/y/eekv0DJhUf0EmQ08hC0AC

***Steady, Moderate Growth For Merchant DSP Boards
The total market opportunity for merchant DSP boards will climb to $760 
million in 2008, resulting in a 5.7% compound annual growth rate (CAGR) 
from 2002 to 2008, according to Venture Development Corp. Broken down by 
category, slot cards will grow at a 5% rate, mezzanine/daughter cards 
and plug-in modules at 9%, and other platforms -- such as PC/104, 
PCMCIA, and standalone configurations -- will grow the fastest: 11.8%. 
VDC says that although digital signal processing in general is growing 
very quickly, this growth has not translated into the embedded merchant 
board space. The real growth lies in deeply embedded applications, with 
boards that are customer and end-processor specific. While these 
applications provide opportunities for silicon vendors and contract 
manufacturing houses, products using these boards are not designed to 
accept merchant boards.
     Venture Development Corp. ==> http://lists.planetee.com/cgi-bin3/DM/y/eekv0DJhUf0EmQ0BFpK0Am

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4. Upcoming Industry Events
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March 7-11, Nanotech 2004
Boston, Mass.
http://lists.planetee.com/cgi-bin3/DM/y/eekv0DJhUf0EmQ0BFpL0An

March 29-April 1, Embedded Systems Conference
San Francisco, Calif.
http://lists.planetee.com/cgi-bin3/DM/y/eekv0DJhUf0EmQ05Tu0Ad 

April 18-21, International Symposium on Physical Design (ISPD)
Phoenix, Ariz.
http://lists.planetee.com/cgi-bin3/DM/y/eekv0DJhUf0EmQ0BFpM0Ao 

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5. Magazine Highlights
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In case you missed them, here are some of the high points of our most 
recent issue.

February 16, 2004:

* Cover Story: Engineering Feature -- Designers Pick EDA Favorites: 
Tools To Get It Right -- Fast!
Engineers have a lot of positive things to say about the current state 
of the EDA industry, including some good ideas on how to improve tools.

* Leapfrog: Industry First -- Integrated Digital POL Power-Management 
System Simplifies Design, Cuts Costs
Thanks to an innovative architecture, this system enables 32 POL 
converters to communicate effectively under the guidance of a single 
system controller.

* Technology Report: 64-Bit Processors Promise Power-Packed Solutions

* Design View / Design Solution -- It Takes A Super Sleuth To Really 
Debug Clock-Timing Problems

For the complete Table of Contents, go to 
Electronic Design ==> 
http://lists.planetee.com/cgi-bin3/DM/y/eekv0DJhUf0EmQ0BFpN0Ap

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CONTACTS: Electronic Design UPDATE e-NEWSLETTER
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Editorial: Lucinda Mattera, Associate Chief Editor:
mailto:[email protected]

Advertising/Sponsorship Opportunities: Bill Baumann, Associate 
Publisher: 
mailto:[email protected]
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