Electronic Design

Electronic Design UPDATE: November 19, 2003


Electronic Design UPDATE e-Newsletter Electronic Design Magazine PlanetEE ==> www.planetee.com November 19, 2003


*************************ADVERTISEMENT************************** Final Inch(TM) Routing Models from Samtec Simplify PCB design for high-speed connectors with Samtec FINAL INCH(TM) reference designs for the trace breakout region around the connectors. These designs save design, development and validation time and resources with downloadable art files, SPICE models and test kits. http://lists.planetee.com/cgi-bin3/DM/y/edfj0DJhUf0EmQ0BDpg0Au **************************************************************** FOR THE LATEST, visit www.elecdesign.com, where the power of Electronic Design is a mouse click away! Read our Web exclusives, discover Featured Vendors, access our archives, share viewpoints in our Forums, explore our e-newsletters, and more. Be sure to participate in our current QUICK POLL: Bill Wong, Embedded Editor, asks software developers: Do you use trace support when debugging applications? Take the QUICK POLL or e-mail Bill at [email protected] Go to Electronic Design ==> http://lists.planetee.com/cgi-bin3/DM/y/edfj0DJhUf0EmQ03Hf0Aq Today's Table of Contents: 1. Editor's View * Voltage And Feature Scaling -- How Low Can We Go? 2. Focus On Embedded Design * Have Chassis, Will Travel 3. News From The Editors * PCI Board Holds 20 Counter/Timers * Four RDRAM Channels Give Motherboard Chip Top Bandwidth * Motion Processors Boast Multiple Configurations * Fast Growth For China's IC Assembly And Test Industry 4. Upcoming Industry Events * International Conference on VLSI of SOCs * IEEE Global Telecommunications Conference * International Electron Devices Meeting * Flat Information Displays (FID) Conference * Bluetooth Americas 5. Magazine Highlights: November 10, 2003 issue: * Cover Story: Engineering Feature -- The PC: The Ultimate Tool For Today's Designers * Leapfrog: Industry First -- RTL-Based Models Speed Pre-Silicon Software Checks * Leapfrog: First Look -- Switch Chip Fuels Third-Generation InfiniBand * Conference Preview -- What's Hot At Comdex * Design View / Design Solution -- Leading-Edge Diagnostic Tools Help Ramp Up SoC Production Edited by John Novellino ********************** 1. Editor's View -- Exclusive to Electronic Design UPDATE ********************** Voltage And Feature Scaling -- How Low Can We Go? David Bursky, Digital ICs/DSP Editor To boost operating speeds and circuit densities, researchers have found ways to shrink the gate dimensions and other physical features of transistors. At the same time, they have lowered the transistors' threshold voltages to reduce supply voltages. But even though the power per device is going down, increased integration often ends up causing an overall power increase at the chip level. So, still lower supply voltages are needed. Today, chips fabricated with 0.13-micron and smaller design rules typically operate from two supplies, one for the I/O interfaces and another for the core circuitry. The I/O interfaces typically run at 2.5 to 3.3 V, while the core logic might operate at 1.2 to 1.8 V. Even at such a low voltage, the latest generation of desktop/server processors -- such as the Xeon, Itanium, UltraSPARC, and Opteron -- operates at internal clock speeds of 1 GHz and faster, typically consuming 80 to 125 W when active. If "performance at any price" is the main driver, then the scaling that is taking place can continue for several generations, leaving designers to handle chips with power levels of 200 W or more. However, cooling these chips will require more complex heat-removal schemes that could turn the systems into more plumbing than silicon. As features get smaller, especially to 0.09 micron and below, lower supply voltages are also needed to prevent oxide shorts and other damage. But dropping the operation below 1.2 V causes another chain reaction. As the power-supply voltage approaches the transistor threshold voltage, Vt must also be reduced. Yet that increases subthreshold leakage currents, gate leakage currents, and junction leakage, so the transistors don't operate properly. For chips of up to a few million transistors, the leakage is manageable. However, the latest processors contain 40 million or more transistors, and processors expected in 2004 will contain close to 500 million transistors. This will result in overall leakage currents of 20 to 40 amps when the chip is idling. (Yes, amps, not milliamps!) Thus one of the big challenges that chip designers face is how to lower dissipation without backing off and re-increasing the supply voltage. Several solutions are available, and others are emerging. One approach being explored is to design circuits that employ both high- and low-Vt transistors and allowing the circuit to select the appropriate device depending on whether the circuit is active or idle. The ability to create transistors with differing Vts is available, but it adds several process steps to the manufacturing flow and increases circuit complexity. Those factors would push the cost of the chip higher. Another approach is to use a silicon-on-insulator (SOI) base wafer rather than a standard bulk-silicon wafer. The use of SOI drastically cuts leakage currents and losses caused by parasitic capacitances. This approach has gained acceptance at IBM and other companies for manufacturing microprocessors and several other products. A new approach recently unveiled by Transmeta for its Efficeon processor, called LongRun2, adds a software-controlled leakage-management option that dynamically adjusts the transistor's Vt to help control leakage current. This solves the conundrum of opposing needs: Transistors with a lower Vt switch faster but have more leakage, while transistors with a higher Vt have less leakage but switch slower. Previously, a balance had to be achieved to optimize Vt for the best speed-power combination. In Transmeta's approach, the CPU's internal firmware will dynamically adjust Vt to optimize the speed-power product. That will reduce the Efficeon's chip leakage current by a factor of 70. A lot of research can still be done in the area of scaling and performance optimization. We will eventually see the results in the form of a laptop that could last for days on a battery charge, cell phones that deliver multiple weeks of standby time between charges, and many other products that can reap the benefits of these new approaches, combined with other power-conscious circuit designs. To comment on this Editor's View, go to Reader Comments at the foot of the Web page: Electronic Design UPDATE ==> http://lists.planetee.com/cgi-bin3/DM/y/edfj0DJhUf0EmQ0BDph0Av *************************ADVERTISEMENT************************** Noritake is now offering a FREE Development Kit for its 7000 module (see www.noritake-elec.com) to any company that is serious about learning more about this remarkable display. Software designers can demonstrate a message from virtually any Windows PC and the code is recorded automatically. Simply click on the following link and request a live demonstration by a Noritake representative. The kit used to demonstrate the features would then be yours to keep. Contact a Noritake Representative at: http://lists.planetee.com/cgi-bin3/DM/y/edfj0DJhUf0EmQ0BDkA0AD **************************************************************** ********************** 2. Focus On Embedded Design ********************** ***Have Chassis, Will Travel The Type 32 eight-slot CompactPCI chassis is only 17 in. high and 10.5 in. wide. It won't fit in an attache case, but its built-in handle makes it more mobile than the conventional rack-mount chassis. The Type 32 has PICMG 2.16 backplane options, making it a portable fabric development system. There is space for a pair of 5.25-in. hard disk drives. The 350-W power supply plugs into a standard 110-V outlet. Its vinyl-clad aluminum covers are scratch-resistant, and the rubber-soled feet prevent tabletop scratches. The Type 32 eight-slot CompactPCI chassis starts under $2500. Elma Electronics Inc. ==> http://lists.planetee.com/cgi-bin3/DM/y/edfj0DJhUf0EmQ0BDb20An ********************** 3. News -- From The Editors ********************** ***PCI Board Holds 20 Counter/Timers A 20-channel up/down counter/timer board for PCI-bus computers incorporates four CTS9513 counter/timer ICs, each with five 16-bit counters. The chips are software-programmable for event counting, pulse width, and frequency measurement and generation. They can also generate complex duty cycle outputs in continuous and one-shot modes. The board, the PCI-CTR20HD, has a maximum input frequency of 6.8 MHz, with a minimum pulse width of 70 ns. It is supported by LabView, SoftWIRE, Agilent VEE, and Matlab. Users can also program it in Visual Basic, C#, C++, or any other popular language by using Measurement Computing's Universal Library. The PCI-CTR20HD lists for $499 and is available from stock. Measurement Computing ==> http://lists.planetee.com/cgi-bin3/DM/y/edfj0DJhUf0EmQ0BDpi0Aw ***Four RDRAM Channels Give Motherboard Chip Top Bandwidth With four RDRAM memory channels, the R659 motherboard chip set delivers an industry-leading memory bandwidth of 9.6 Gbytes/s. The chip supports 800-, 1066-, and 1200-MHz RDRAM memories with a low-latency architecture that includes a dynamic look-ahead cache and adaptive page management. When using 1200-MHz RDRAMs, the look-ahead cache trims latency to as little as 10 ns. In comparison, a DDR400 memory with a standard cache has a minimum latency of 25 ns. The R659 also includes a 4X/8X AGP graphics port and the company's MuTIOL high-speed interface. The interface ties the R659 to the R964 multifunction I/O chip, which packs integrated serial ATA, AC'97, 10/100 LAN, and USB 2.0 controllers, as well as dual integrated-development-environment channels, mouse, keyboard, and floppy interfaces. Contact the company for current pricing. Silicon Integrated Systems Corp. ==> http://lists.planetee.com/cgi-bin3/DM/y/edfj0DJhUf0EmQ0BDpj0Ax ***Motion Processors Boast Multiple Configurations The Magellan family of motion processors is available in one-, two-, three-, and four-axis configurations. The devices control dc brush, brushless dc, microstepping, and pulse and direction motors and provide profile generation, servo loop closure, PLC-style signal manipulation, and motor signal generation. Features include a programmable PID filter with velocity and acceleration feedforward, 32-bit position error, dual bi-quad filters, 50-microsecond loop time, and multi-axis synchronization. Selectable profile modes include S-curve, trapezoidal, velocity contouring, and electronic gearing. The devices accept input parameters such as position, velocity, and acceleration from the host microprocessor and generate a corresponding signal. Prices start at $24 each for single-axis units in OEM quantities. Performance Motion Devices Inc. ==> http://lists.planetee.com/cgi-bin3/DM/y/edfj0DJhUf0EmQ0BDpk0Ay ***Fast Growth For China's IC Assembly And Test Industry The semiconductor assembly and test business in China is expanding rapidly and expected to hit $10.3 billion in 2007 from a mere $3.6 in 2002 for a compound annual growth rate of 23%, according to iSuppli Corp., a market research firm in El Segundo, Calif. With an annual packaging capacity of more than 40.1 billion units, China has achieved volume capability in technology like dual in-line package, small-outline package, small-outline transistor, quad flat pack, and plastic leaded chip carrier. It can also support more advanced technologies like pin-grid array, ball-grid array, and multichip package. Factors encouraging growth include low labor costs, preferential government policies, and the rapid development of wafer foundries in China, according to iSuppli. iSuppli Corp. ==> http://lists.planetee.com/cgi-bin3/DM/y/edfj0DJhUf0EmQ0BCl80A3 ********************** 4. Upcoming Industry Events ********************** Dec. 1-3, International Conference on VLSI of SOCs Darmstadt, Germany http://lists.planetee.com/cgi-bin3/DM/y/edfj0DJhUf0EmQ0BDpl0Az Dec. 1-5, IEEE Global Telecommunications Conference (Globecom) San Francisco, Calif. http://lists.planetee.com/cgi-bin3/DM/y/edfj0DJhUf0EmQ0BDpm0A1 Dec. 7-10, International Electron Devices Meeting (IEDM) Washington, D.C. http://lists.planetee.com/cgi-bin3/DM/y/edfj0DJhUf0EmQ0BDpn0A2 Dec. 8-10, Flat Information Displays (FID) Conference Monterey, Calif. http://lists.planetee.com/cgi-bin3/DM/y/edfj0DJhUf0EmQ0BDXY0AI Dec. 9-11, Bluetooth Americas San Jose, Calif. http://lists.planetee.com/cgi-bin3/DM/y/edfj0DJhUf0EmQ0BDpo0A3 ********************** 5. Magazine Highlights ********************** In case you missed them, here are some of the high points of our most recent issue. November 10, 2003: * Cover Story: Engineering Feature -- The PC: The Ultimate Tool For Today's Designers Sophisticated software for analysis, design, test, and measurement have garnered respect for the PC as a versatile engineering tool. * Leapfrog: Industry First -- RTL-Based Models Speed Pre-Silicon Software Checks With a compiler that spins secure models of "golden" RTL and a tool that runs them at speeds simulators can't even dream of, pre-silicon software validation has become a reality. * Leapfrog: First Look -- Switch Chip Fuels Third-Generation InfiniBand Low cost, a small footprint, and blazing speed keep InfiniBand ahead of the pack. * Conference Preview -- What's Hot At Comdex Consumer products from desktops to home-projection systems take over the Las Vegas showcase. * Design View / Design Solution -- Leading-Edge Diagnostic Tools Help Ramp Up SoC Production For the complete Table of Contents, go to Electronic Design ==> http://lists.planetee.com/cgi-bin3/DM/y/edfj0DJhUf0EmQ0BDpp0A4




Editorial: Lucinda Mattera, Associate Chief Editor: mailto:[email protected] Advertising/Sponsorship Opportunities: Bill Baumann, Associate Publisher: mailto:[email protected]


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