Moore's Law Marches Forward

Sept. 20, 2004
Going one more with Moore's. That's the case with a 70-Mbit static random-access-memory (SRAM) chip packed with over 500 million transistors. Using 65-nm technology, this chip from Intel features gates that measure 35 nm with a 1.2-nm gate oxide...

Going one more with Moore's. That's the case with a 70-Mbit static random-access-memory (SRAM) chip packed with over 500 million transistors. Using 65-nm technology, this chip from Intel features gates that measure 35 nm with a 1.2-nm gate oxide thickness. That's 30% smaller than the gate lengths on the company's previous 90-nm chips. The chip's strained silicon technology boosts transistor performance by 10% to 15% without increasing leakage. Its reduced gate capacitance lowers the chip's active power. The new process also integrates eight copper interconnect layers and uses a low-k dielectric material that accelerates the signal speed inside the chip and slashes power consumption even further. On top of that, "sleep transistors" in the 65-nm SRAM shut off the current flow to large blocks of the SRAM when they're not being used, bringing power consumption down another notch. Intel believes that these developments will build the foundation for multicore processors and innovative features like virtualization and security capabilities in new products. For more information, go to www.intel.com.

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