Process Boosts Next-Gen FinFET Gate Reliability

Process Boosts Next-Gen FinFET Gate Reliability

Imec recently unveiled strained Germanium devices based on a silicon-replacement process, a first according to the research center. The process involves growing a Ge/SiGe quantum-well heterostructure by epitaxially replacing a conventional silicon-based shallow trench isolation (STI). The technique allows for highly versatile integration of heterogeneous material with silicon, leading the way to future heterogeneous FinFET/nanowire devices. The device shows superior gate reliability (NBTI) over silicon channel devices due to a unique energy band structure of the compressively-strained germanium channel. With the option to introduce heterostructure into next-generation FinFET technology, it’s possible to engineer quantum-well channels based on a combination of materials that enhance both mobility and electrostatics.

IMEC
 

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