Electronic Design

Programmable Logic</A><BR><FONT CLASS=body11>Sponsored by: <A HREF="http://www.altera.com" TARGET=_blank CLASS=body11>ALTERA CORP.</A></FONT><A>

Understanding The Options Lets You Optimize System Performance

Programmable logic has been in the design toolbox since the early 1970s. Over the years, it has become a vital part of design. It had a humble beginning, back when programmable array logic (PAL) devices could replace a mere 10 to 20 gates of logic. Today, complex programmable logic devices (CPLDs) can handle hundreds of thousands of gates, and field-programmable gate arrays (FPGAs) can provide millions of gates to implement full systems on a single chip. These devices now have capacities and performance levels to meet a large percentage of system needs.

Lots and Lots of Choices
So where do programmable logic devices fit in the realm of design options? For starters, designers have many options in picking the best approach for developing a design (Fig. 1). General-purpose CPUs, microcontrollers, application-specific standard products (ASSPs), and other off-the-shelf devices offer the simplest path but may provide limited performance and choice. CPLDs and FPGAs supply lots of flexibility and fast market entry with low nonrecurring engineering (NRE) costs. Alternative solutions like structured application-specific ICs (ASICs), cell-based ASICs, and full-custom ICs provide the most flexibility and often higher performance, but they have much higher NRE costs associated with them.

In prototyping and very low-volume applications, CPLDs and FPGAs win the selection decision hands down because amortizing the high NRE costs for an ASIC would significantly increase the ASIC per-chip cost for low-volume applications. Yet as usage volumes increase, it’s becoming harder to define the crossover point at which a structured ASIC or cell-based ASIC would become a more cost-effective option to replace a programmable chip. Some of the programmable logic vendors also offer a structured-ASIC migration path for their high-density devices. Such a device can be used to lower component costs if the production volumes go past the crossover point.

In the past, the crossover point was estimated at about 10,000 units. But unit pricing for programmable devices has come down considerably over the last few years, pushing the decision point well past the 100,000-unit level in many applications, and in some cases, to the million-unit mark.

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