Demands on cell phones and other portables have quickly escalated beyond just holding conversations or running a simple browser. At this stage, designers turn to high-performance coprocessors to incorporate snappy 3D/2D graphics, MPEG4-quality video, and high-resolution cameras with multi-megapixel sensors.
One such coprocessor is Fujitsu Microelectronics' MB86V00 mobile multimedia processor. It integrates a novel low-power 3D/2D graphics engine, a dedicated JPEG codec, an MPEG4 codec, and an image processing engine, as well as interfaces for off-chip SDRAM, a host CPU, YUV422 video, and general-purpose I/O lines. (For an online, detailed view of the MB86V00 architecture, go to Drill Deeper 7705.)
One of the biggest challenges in the mobile world is minimizing power consumption, which the MB86V00 processor handles by keeping the active current drain to less than 45 mA, typical, and the standby current drain to just 50 to 80 µA. Fujitsu's designers accomplished this by first fabricating the chip on a low-leakage 180-nm process. In addition, the internal clock was kept to just 54 MHz (13.5-MHz external clock), and extensive use of clock gating helped turn blocks of logic on and off. Lastly, a novel motion-estimation algorithm cuts the number of computations needed by almost a factor of 10, reducing the active power drain.
An embedded ARM7TDMI 32-bit RISC processor handles all on-chip housekeeping. Specialized support blocks perform image scaling and image rotation (in 90° steps). The image processing engine supports cubic and bilinear filtering of the images, as well as color interpolation. It also offers ports for two CCD or CIS camera module interfaces, initially one 2-Mpixel sensor and one VGA-resolution sensor.
Beyond the two camera inputs, the chip features two LCD controller outputs, one for a "main" screen that provides up to 16M colors with a resolution of VGA or less. The controller supports up to three overlay layers, Alpha blending, transparency, partial indication, format conversion (from YcbCr to RGB), and special effects (black and white, sepia, negative, others). A second display chip-select line enables a secondary LCD screen to be used. That's because the line lets the chip direct the LCD control signals to either display.
The high-performance graphics engine delivers up to 3 million polygons/s. Graphics operations include Alpha blending, texture mapping, Z buffering, and polygon drawing. An 8-bit pallet code, 16-bit color, and 24-bit color can be used as a drawing color. Frame overlays are possible, so still images can be placed over active videos.
A full MPEG4 video codec (version 1 simple profile) is part of the on-chip logic, delivering CIF streams at 15 frames/s or VGA resolution stream at 15 frames/s (either encode or decode). The VGA capability isn't part of the MPEG4 Simple Profile, but it was added as a supplement.
An external SDRAM is required to complete the graphics/video subsystem. Thanks to the company's packaging expertise, the 64-Mbit SDRAM is stacked inside the chip package, right on top of the MB86V00 processor. This results in the smallest-footprint graphics and image processor—just 10 by 10 mm for the 289-contact fine-pitch BGA package. A version without the SDRAM, the MB86V01, also is available.
Full software support, as Lapis firmware, is available from the company. Lapis' core object module provides image-processing software that runs on the ARM7 core. Device-driver source code for camera modules and LCD panels enables designers to select almost any camera module or display for use with the chip.
The Lapis package also includes interface software to link the firmware functions to a host application and driver software to leverage the 2D/3D graphics accelerator in the host applications (Java, Web browser, etc.). The software and companion Fujitsu real-time operating system complies with microITRON 4.0.
Available this month, the MB86V00 will sell for $45 apiece in sample quantities.
Fujitsu Microelectronics America Inc.