Car Makers Put FPGAs In The Driving Seat

Martin Mason looks at how the automotive and consumer products sectors will move FPGA usage up a gear.

Market analysts expect the overall programmable-logic market to nearly triple in size between 2002 and 2008. But whilst growth in the sector has historically been driven by the demands of the communications and networking industries, the next stage of expansion is expected to come from the automotive and consumer markets.

Analysts at Gartner Dataquest predict a tenfold increase in FPGA use in consumer applications between 2002 and 2008. This will be fueled by products such as new digital and high-definition broadcast equipment, gaming and multimedia entertainment systems, LCD and plasma-display technology, and by the use of home DVR and DVD-W technologies.

In the automotive market, FPGAs will be increasingly used for in-car entertainment systems and in-car GPS navigation, information, communication, and safety systems.

So what is behind the analysts' predictions of a shift in the usage patterns of programmable logic?

Traditionally, FPGAs have been used in two situations: low-volume applications and prototyping. Recently, however, more FPGAs are being used in production applications. Why? Because they are not so expensive now. FPGA manufacturers have taken advantage of new semiconductor process technologies to reduce costs whilst increasing NREs have sent the overall price of ASICs in the opposite direction. At the same time, some of the drawbacks of traditional SRAM-based FPGAs have been overcome. Gate counts have grown and flash-based devices eliminated the security problems, reliability drawbacks, and the need for additional external components, which are such disadvantages for older in-system programmable solutions.

Engineers have also realised that specifying FPGAs can hold advantages over the use of an ASIC. For instance, with an FPGA, the design team can make late changes.

It is against this background that a new ASIC alternative, the value FPGA, has emerged to address engineers' requirements for a technology capable of meeting today's shrinking development cycles, with a low-cost structure. Technologies such as Actel's flash-based ProASIC3 family offer in-system programmability, high-performance programmable logic, and densities to one million system gates and beyond. Perhaps most importantly, such FPGA families are available at unit costs that are highly competitive with ASICs—taking account of NRE—offering price points of sub-$2, sub-$5, sub-$10, and sub-$20.

It might seem that the additional benefits of fast time-to-market and reconfigurability would inevitably tip the balance in favour of the value FPGA. However, just as designers must take account of NRE when calculating the effective unit cost of their ASIC implementations, they must also look at the impact on total system cost when moving to FPGAs. FPGAs based on SRAM technology, for instance, have always required additional support circuitry. Value FPGAs are no different. Each SRAM-based FPGA requires a boot PROM or microcontroller to load its configuration data. To ensure system reliability, designers often add an SRAM power-supply brown-out detection device. Moreover, many designs using SRAM-based FPGAs require a live-at-powerup CPLD to manage system startup, especially if a microcontroller is being used to load the SRAM FPGA.

There may also be a penalty for using SRAM-based devices fabricated on 90nm processes that must meet stringent specifications on powerup. Some devices based on volatile technologies also require careful power-supply sequencing, and external clock-distribution devices may be needed to handle system clock management if the SRAM FPGA's powerup configuration delay makes the device's internal PLL/DLL circuitry unsuitable for this system-level task.

In all, a "value" SRAM-based FPGA may require anywhere from $3 to $20 of support circuitry. Accordingly, that additional cost must be factored in to determine the true overall solution cost. The SRAM system overhead penalty can easily be over 100 percent of the unit cost price of the FPGA—and that is before looking at the soft costs or reliability, inventory-management, and design-complexity issues.

ASICs and non-volatile flash-based FPGAs, in contrast, are single-chip solutions, which are inherently live at powerup and do not require boot PROMs or microcontrollers. Actel's ProASIC3 devices support familiar "ASIC-like" board designs, accommodating single (1.5V) power-supply-based operation, and powering-up and down in a controlled and predictable way. Since they are inherently low power, they reduce power-supply requirements. This is, of course, important in consumer and automotive applications, but also has the knock-on effect of enhancing system reliability and lowering system thermal-management costs.

As well as price, ease of design, and low power operation, FPGAs in this new market must also match other characteristics of ASICs, such as security and reliability. Flash-based designs have long been known to be more resistant to firm and soft errors caused by neutron collisions—a common occurrence in high-altitude applications. But they're also increasingly recognised as an issue in ground-based applications.

From a system security viewpoint, flash-based designs offer better protection against theft of critical IP. They are difficult to reverse-engineer and there is no PROM-to-FPGA bitstream that can be intercepted at startup.

ProASIC3 devices are also designed with an on-chip 1024-bit non-volatile flash ROM (FROM) and a built-in 128-bit AES decryption core, which facilitates independent, secure, in-system programming (ISP) of both the FPGA core array fabric and the FROM itself. This allows designers to implement a number of secure features. For instance, an AES master key can be preloaded into the device in a secure programming environment. Users can then ship 'blank' parts to an insecure programming or manufacturing centre for final personalisation with an AES encrypted bit stream.

Designers can use this feature to implement the late-stage product changes that are such an attractive feature of choosing an FPGA solution. In a similar manner, designers can perform secure remote field updates over public networks, such as the Internet or via satellite, by simply sending a configuration file with AES-encrypted data.

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