A dual-channel transceiver with JTAG IEEE 1149.1 compliant boundary scan, the S2102 performs up to 1.062 Gb/s in full duplex. Intended for serial transmission in a variety of Fibre Channel applications such as workstations, frame buffers, switched networks and proprietary backplanes, the S2102 supports full- and half-rate operation in all modes. The interconnect IC provides two separate transceivers that are operated individually for an aggregate data capacity of more than 2 Gb/s or 4 Gb/s in full duplex. Clock generation is performed by a flexible on-chip transmit PLL that synthesizes the high-speed clock for both transmitters. The on-chip dual receive PLLs are used for clock recovery and data re-timing on the two independent data inputs. The transmitter and receiver feature internally series-terminated TTL outputs and low jitter serial PECL interfaces to ensure signal integrity.