The method presented here provides a microcontroller with eight real-time interrupts instead of just one without giving up any of the processor’s standard I/O lines. This design uses a microcontroller's built-in SCI (Serial Communications Interface) to read the eight interrupt status lines. The only requirement is that the SCI provide a clock, data-input line, and an external control line.
A Motorola 68HC811 was used to prototype and test this design. A 74HC165 parallel-to-shift register loads the status of the eight real-time interrupt lines and then serially shifts the data to the microcontroller. The 74HC30 eight-input NAND gate senses all eight interrupts.
Any one or more of the eight interrupt lines going to an active low state will cause the NAND gate to produce an active high signal (see the figure). Then the signal gets inverted and sent to the real-time interrupt pin on the microcontroller (in this case, the 68HC811’s XIRQ). At this time, the software instructs the microcontroller to drive its SS (Slave Select) line low, causing the status of the interrupt lines to be loaded into the 74C165. The software then drives the SS line high again and initiates a read of its serial input line (MISO on the 68HC811). Once the status of the eight interrupt lines are read, the software examines the data sequentially to determine which interrupt service routine to execute.
One advantage of this scheme is that multiple interrupts can be captured simultaneously and serviced in terms of priority. IRQ1 is given highest priority in this design, while IRQ8 is given lowest priority. The software written for the 68HC811 also uses the RS-232 interface. It displays the interrupt currently being serviced (see the listing).