Miniaturization. Lower costs. Lower power dissipation. Smaller form factors. These demands are driving the consumer, medical, communications, automotive, industrial, and military markets. But rapid advances in components are giving design engineers the tools they need to meet these challenges.
A host of technologies are competing for many applications in flat-panel displays. LCDs continue to dominate flat-panel displays, but they're feeling the heat from plasma-panel displays within the coveted large-screen digital high-definition TV (HDTV) home-theater market. Other technologies include electroluminescent organic light-emitting-diode (OLED) displays and surface-emitting displays (SEDs). Not to be outdone, the venerable cathode-ray tube (CRT) is making progress in trying to be as thin and lightweight as flat-panel displays while retaining its low cost and high image quality. Electronic ink (electronic paper) for consumer and computer applications should have a huge impact as well.
At the same time, passive components like resistors, capacitors, and inductors—the "bread and butter" of electronic circuits—continue advancing through better material formulations and more careful layout. This lets them keep up with the general miniaturization of ICs. Passive components can now be found in extremely small packages, as individual components or arrays, as well as in die form, matching the required performance levels of the silicon ICs they work in. Here, microelectromechanical systems (MEMS) devices are playing a large role.
BETTER MATERIALS ARE ESSENTIAL
Termination and fine-tuning of silicon IC devices and circuits will always require passive components. Future passives may not resemble their earlier ancestors—just compare a modern electrolytic capacitor to its counterpart from two decades ago. But they'll continue to function in their roles thanks to advances in material properties science that will completely transform them.
The CMOS process, which is the most common IC process, may yet incorporate nearly every component needed for an electronic circuit. These include passive components that are driven by thick-film and thin-film materials for resistors and barium-titanate materials for capacitors. Again, MEMS technology is a major factor in the development of CMOS-type capacitors, inductors, and filters or resonators.
All-CMOS oscillators are the latest rage in the total integration of discrete components. So far, several manufacturers have released very tiny all-silicon oscillator IC packages. One company, however, has already shown that a total all-silicon oscillator can be integrated on the same chip housing logic, memory, and microprocessors. What comes next is anyone's guess, though it's safe to speculate that this trend will continue, given the steady stream of advances in silicon IC processing. There's already talk of integrating components like antennas, sensors, switches, and actuators on the same silicon chip.
But these miniaturization advances can't be put to useful cost-effective tasks without the proper package that makes their functions available to the outside world. And, the packaging challenge becomes greater as devices shrink further. Packaging and testing (which itself gets more challenging) are two of the largest cost factors in bringing silicon ICs to market. They can constitute as much as 70% to 90% of an IC's total cost. That's because the shrinking IC makes it more difficult for standard packaging production lines to handle and test them effectively.
COST-EFFECTIVE PACKAGE MINIATURIZATION *
The squeeze is on to come up with cost-effective packaging that meets market performance and cost demands. There's only so much researchers can do to expand a chip in length and width before it becomes impractical for several reasons, not the least of which is cost. So, they're now looking at the third dimension of height. Going in the Z direction enables them to stack more parts onto a chip within the same footprint.
Although an all-silicon 3D device is ultimately the best answer, packaging experts have found a more cost-effective solution in the system-in-a-package (SiP) approach. This method is more compatible with current production equipment, with minor modifications. It also can bring products to market much faster and less expensively than the conventional total integration technique, namely the system on a chip (SoC).
Packaging technology faces one of its biggest challenges in heat management. While heatsinks have seen major improvements, there's a need for a better understanding of heat-flow patterns in these tiny packages. Package developers are increasingly turning more to electronic-design-automation (EDA) companies for programs that better simulate a package's thermal behavior.
Just as challenging is the mandated need for "greener" electronics. The European Union Parliament's Waste Electrical and Electronic Equipment (WEEE) and the Restriction on the use of certain Hazardous Substances (RoHS) acts will take effect August 13, 2005 and July 1, 2006, respectively. Key will be the drive to eliminate lead. The green trend is particularly strong in Europe and Japan, and the U.S. is jumping on the lead-free bandwagon.
On a larger scale, packaging technology simply needs better materials. This pressing issue must address future high-frequency, high-power-density, and increased mechanical strength demands of electronics technology.
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