Simulator Reduces Design Time For DSP And Wireless Systems

Oct. 1, 1998
Modeling, analysis and debugging features that make it easier to simulate and test complete wireless communication applications at the system level have been added to Version 2.1 of SystemView. The simulator's system-level design and simulation

Modeling, analysis and debugging features that make it easier to simulate and test complete wireless communication applications at the system level have been added to Version 2.1 of SystemView. The simulator's system-level design and simulation capabilities enable users to verify that their wireless product's different subsystems, such as the RF front end, A/D converter and DSP functions, will all interact together correctly. The result is reduced time-to-market through detection of errors early in the design cycle, rather than during final system integration and testing.Version 2.1 includes a number of enhancements, including a three-channel dynamic system probe. This is said to be exclusive to SystemView and to greatly simplify debugging. A designer can trace a signal through an entire system simply by moving the probe to the output of each block during system execution, thereby quickly pinpointing the source of the problem in real time. In addition to time waveforms, the probe can display data as constellations and eye patterns, as well as in the frequency domain.Also included in Version 2.1 are enhancements to the tool's RF/analog, DSP, communications and CDMA libraries. These libraries provide pre-existing functional building blocks that enable designers to build complete applications. Additions include bandstop analog filters such as Butterworth, Bessel, Chebyshev, elliptic and linear phase. There also are many new DSP models to support developers of DSP applications usingXilinx FPGAs. In the communications library, the convolutional encoder may now be customized with user-defined code polynomials for support of any coding scheme.

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