The THS1206 is claimed as the industry’s first DSP-optimized analog-to-digital converter with 16 words of on-chip FIFO memory. It addresses the bottleneck that’s often found in moving data from the ADC into the DSP by improving data transfer rates by six times over what it would be without the FIFO.For example, a TMS320C542 DSP running at 40 MHz can accept data at a 1-MSPS rate without a FIFO. When using the THS1206, the data rate improves to 6 MSPS. The ADC achieves this gain by distributing the process interrupt latency over each sample in the FIFO. The converter is able to bundle a relatively large amount of data together before interrupting and subsequently transferring the data to the DSP. It also offers a built-in address decoder so that two devices can be directly connected to a DSP without need for external logic. Differential nonlinearity is specified at ±1 LSB maximum.