Wireless Systems Design

Chip Set Slashes Per-Channel Costs

This UMTS Base-Station Chip Set Cuts OEM ASIC Development Costs While Doubling Channel Density.

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Of all the technical aspects of 3G cellular network deployment, the channel-card system may have garnered the most attention from cost-conscious cellular carriers. By relying on a combination of DSP and ASIC architectures, existing 3G UMTS channel cards have been able to provide wideband packet data with rates of 384 to 2000 kbps. To achieve these high data rates while handling the complex computational functionality needed for 3G, networks required the close coordination of both DSP and ASIC designs. For cellular-infrastructure manufacturers that deploy 3G base stations, this often meant suffering the expense and time needed to create their own ASICs.

Thanks to the introduction of a new class of highly programmable baseband chip sets, this situation should greatly improve. According to Texas Instruments (TI), its flexible TCPI100 family of chips will enable those manufacturers to create low-cost, differentiated channel cards for 3G base stations (see figure).

TI's highly customizable UMTS digital baseband chip set features the TMS320TCI100 DSP. This DSP is tailored to the wireless infrastructure. It is tightly coupled to the TMS320TCI110 receive and TMS320TCI120 transmit chip-rate application-specific standard products (ASSPs). These receive and transmit chip-rate ASSPs consist of flexible hardware, which is configured via registers and commands under DSP software control. Differentiation is therefore a straightforward task.

The chip-set combination delivers a highly proven and customizable DSP + ASIC architecture. Best of all, it doesn't carry the high price tag or time-to-market disadvantages that are too often associated with custom ASIC design. In addition, the new wireless-infrastructure chip set actually doubles channel density—up to 64 channels—without significantly increasing the bill of materials (BOM). Using this chip set, base-station manufacturers will be able to drive down the cost of their equipment. At the same time, they'll be able to give their customers the flexibility to utilize their own algorithms and system intellectual property (IP).

The TCPI100 boasts a number of impressive features, including two high-bandwidth parallel interfaces and Turbo and Viterbi embedded processors for forward-error-correction (FEC) coding and decoding. The chip set is both pin and code compatible with the popular TMS3206416. It also is fully capable of supporting and working with TI's recently announced GC5016 digital up-/downconverter for 3G wireless base transceiver systems.

All customizable receive chip-rate functions within the TCPI100 chip set are handled by the TCI110. This ASSP gives designers a single device for finger despreading. It also allows for random-access-channel (RACH) preamble detection and searching for up to 64 users. In contrast, today's systems support only 32 users. Communication between the TCI110 chip-rate ASSP and the TCI100 DSP is accomplished via a 64-b memory interface bus. This bus operates at a clock rate of 122.88 MHz, giving the interface itself a bandwidth of 7.8 Gbps.

The TCI120 transmit chip-rate ASSP supports a configurable number of sectors and users per sector. It features multiple spreading, scrambling, and channel gain blocks. Subsequently, it allows any dedicated channel to be dynamically allocated across any sector.

The TCI120 chip set also includes a multichannel-buffered-serial-port (McBSP) interface. It handles the low-latency transfer of closed-loop data, such as power control, closed-loop transmit diversity, and acquisition-indicator-channel (AICH) information. With its appropriate-modulation and slot-format options, it even supports the newly standardized, high-speed-downlink-packet-access (HSDPA) UMTS channel.

Development tools and foundation software are provided with the TCI100 base-station chip set. Among the tools are an evaluation module (EVM) that enables early code development and Code Composer Studio plug-in emulator probes. The latter tool provides real-time diagnostic visibility into both the TCI110 receive and the TCI120 transmit chips. The TCI100 chip set also comes with chip-rate and symbol-rate application libraries.

Samples of the TCI100 DSP, TCI110 receive, and TCI120 transmit chip sets are scheduled to be available in the third quarter of this year. A white paper and UMTS chip set product bulletin can be downloaded today at www.ti.com/tci1xwp_wi.

Limited preliminary samples of the GC5016 wideband digital downconverter and upconverter are available now. Production devices will be widely available in the third quarter of 2003. Download the GC5016 data sheet today at www.ti.com/GC5016ds_wi.

Texas Instruments, Inc.
12500 TI Blvd., Dallas, TX 75243-4136; (800) 336-5236, www.ti.com.

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