Electronic Design

Clockless 80C51 Core Receives Memory eXtension

A clockless microcomputer core based on the versatile 80C51 Memory eXtension (MX) architecture combines the larger memory capabilities of the MX architecture with the low power and low electromagnetic emission (EME) advantages of Handshake Technology. The HT80C51MX from Handshake Solutions is particularly suited to use in smart cards and other complex, memory-hungry 8-bit applications. Handshake Technology is the first commercial design methodology for creating clockless ICs, according to Handshake Solutions. It offers designers a simple and robust way to access the benefits of clockless designs, such as low power consumption, EME, and current peaks.

The MX architecture extends the memory-addressing capabilities of the familiar 80C51 core beyond the original 64-kbyte limit, up to a maximum 8 Mbytes of program and 8 Mbytes of data memory. To allow full use of the extended 24-bit memory addressing, the HT80C51MX features a number of dedicated instructions. In addition, specific addressing modes, such as a Universal Pointer, enable high-level language compilers to optimize code easily for both size and execution time.

AVAILABILITY

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PRICING

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FOR MORE INFORMATION

Visit www.handshakesolutions.com.

TAGS: Digital ICs
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