Electronic Design

Conference News

If it's August, it's hot—time for the Hot Chips conference (Aug. 17-19) at Stanford University in Palo Alto, Calif. And that's followed by the Hot Interconnects conference, Aug. 20-22. Both shows focus on high-performance chip designs targeting computing, networking, and communications. Some of the sessions at Hot Chips will look at architectures for supercomputing applications—Cray's 10,000-node Red Storm system and a network for supercomputing applications by Los Alamos Laboratories. In a session on embedded technology, Infineon will describe a multithreaded RISC/DSP processor. Another session on switching and routing will examine a shared-memory Ethernet switch chip with 12 10-Gbit Ethernet ports from Fujitsu, a terabit crossbar switch from Fulcrum, and an adaptive packet processor from Procket. Intel will detail a 10-Gbit/s Ethernet TCP/IP processor. And, Atmel will spotlight its Janus Gigaflop very-long-instruction-word-plus-RISC compute accelerator. Details of the Hot Interconnects program were not available at press time. For full details, go to www.hot.org.

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