Electronic Design

Custom CPUs Are Not Reconfigurable

Standard CPU cores are handy, but often custom CPUs can give a boost to a system so that software can handle more peripheral chores. Typically, the core architecture remains the same while instructions can be added and components such as caches can be resized. The result is a more efficient processor, but not one that's reconfigurable. Frequently, this efficiency can be used to run the processor slower to conserve power. Lots of times these solutions are termed platform-oriented solutions because the core processor provides a platform on which to build more enhanced systems.

Custom CPUs are often paired with libraries of common peripherals. This puts them in competition with reconfigurable solutions if chips don't have to be delivered or configured immediately.

ARC and Tensilica are two companies that push customization as a major feature of their 32-bit processors. ARC's ArcTangent-A4 architecture has numerous configurable options, like DSP extensions, Java support, data and program cache support, and even interrupt control. Standard peripherals include UARTs, timers, Ethernet MACs, and even Bluetooth baseband controllers. VHDL or Verilog is delivered once a designer has made the appropriate architectural selections using the Architect configuration tool.

Tensilica's Xtensa architecture and development tools are logically similar to ARC's. The Tensilica Instruction Extension Language (TIE) provides a standard mechanism for adding new instructions. TIE is integrated with the software development tools, so new instructions can be decoded during debugging. Tensilica has a Web-based configuration tool that presents estimated statistics, like the amount of power that the current design will need.

From a developer's point of view, the big difference between ARC's and Tensilica's solutions and the reconfigurable processors lies in system configuration. In the reconfigurable case, the result is typically a C header file describing peripheral interfaces and a configuration file to be loaded when the processor starts. In a custom CPU, the result is much more extensive. The intellectual property (IP) for the chip is delivered in a form like Verilog. C header files are part of the puzzle too, but frequently code for device drivers must also be included.

Other than the IP support, the biggest difference is the software development tools that need to be customized. For example, the compiler or assembler must provide access to any custom instructions. Debuggers have to accommodate chip-specific features such as custom instruction decode that includes determining the size and number of arguments for the instruction.

TAGS: Digital ICs
Hide comments

Comments

  • Allowed HTML tags: <em> <strong> <blockquote> <br> <p>

Plain text

  • No HTML tags allowed.
  • Web page addresses and e-mail addresses turn into links automatically.
  • Lines and paragraphs break automatically.
Publish