DSP Boosts Performance And I/O Bandwidth

June 2, 2005
Promising improved performance, reduced code size, plus more on-chip memory and high-bandwidth integrated peripherals, the TMS320C6455 digital signal processor is code compatible with previous TMS320C64x devices and integrates Serial RapidIO plus

Promising improved performance, reduced code size, plus more on-chip memory and high-bandwidth integrated peripherals, the TMS320C6455 digital signal processor is code compatible with previous TMS320C64x devices and integrates Serial RapidIO plus other new high-speed peripherals. These include a Gigabit Ethernet MAC, DDR2 external-memory interface, 66-MHz PCI, and 2 MB of L2 memory. The DSP's core adds specialized instructions that are said make code 20% to 30% smaller and 20% more cycle efficient than previous inceptions of the C64x architecture. Instructions include 32-bit wide multiplications and simultaneous add/subtract instructions, and the core can execute eight 16x16 multiply and accumulate instructions per cycle. The device will be available in 1 GHz, 850 MHz, and 720 MHz versions. Initial shipments are expected in the third quarter with volume production scheduled for the second quarter of 2006. Available in a 697-pin, 24 mm x 24 mm BGA, planned pricing is $259 (1 GHz), $219 (850 MHz), and $179 (720 MHz) each/10,000. TEXAS INSTRUMENTS INC., Dallas, TX. (800) 477-8924

Company: TEXAS INSTRUMENTS INC.

Product URL: Click here for more information

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