Today's applications need single DSP chips that can serve both signal-processing tasks and microcontroller operations efficiently. Motorola's enhanced DSP56800E DSP core is architected to do just that. Combining the best of both worlds, it boasts a 16-bit DSP with 32-bit extensibility and MCU-type functions. And, its processing capability has been enhanced to 200 MIPS at a 200-MHz clock. To shorten design time, the DSP core is supported by software and hardware development tools.
Among the 56800E's attributes are a 16-bit ALU with a 36-bit accumulator, a 24-bit address-generator unit (AGU), a program decoder, and a bit-manipulation unit. The instruction set for the enhanced version is a superset of the existing 56800 core. It offers true software-stack-support subroutines, flexible user-defined functions, and multilevel interrupt priority.
Additional features of the new core include 8-, 16-, and 32-bit data types for code flexibility and programming efficiency. Also, the DSP56800E maintains external data and program memory capacity up to 32 and 4 Mbytes, respectively. Enhanced on-chip emulation (EOnCE) for debugging and better precision and consistency through register extensions are assets as well.
In short, the device's throughput has been increased via on-chip parallelism. Consequently, when combined with higher compiler efficiency, real-time debugging, fast interrupt, nested hardware looping, and other addressing modes, the 56800E can execute complex algorithms much faster. Plus, its power consumption has been cut to 0.25 mW/MIP as compared to 0.76 mW/MIP for the 56800 core. To enable an embedded system-on-a-chip (SoC) solution, the 56800E core is fully synthesizable and scannable.
Using the 56800E core as a foundation, Motorola has developed the DSP56853 and DSP56854. These derivatives will run at 120 MHz and are suitable for Internet appliances, telephony, and portable devices. Aside from the core, these DSP devices will supply 32 kbytes of RAM, 10 kbytes of ROM, serial ports, an external memory interface, timer modules, and a general-purpose I/O.
Only the 56854 has an external memory interface. As a result, it comes in a 144-pin LQFP and a 144-solder-bump micro-BGA, while the 56853 comes in an 81-solder-bump micro-BGA package. Supported by the Metrowerks C compiler and IDE toolset, the DSP56853/4 DSPs are expected to sample in the first quarter of 2001. Production is slated to begin in the second quarter. In 10,000-piece quantities, the DSP-56853/4 will be priced below $4.75.
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