DSP Core Simplifies Creation Of VLIW Code

The semiconductor industry just witnessed the arrival of the first complex-domain, extended-precision, very-long-instruction-word (VLIW) DSP core for system-on-a-chip (SoC) implementations. Known as mAgic, this core hails from Atmel Corp. It provides the single-cycle execution of complex arithmetic operations, such as FFT butterflies and vector2 arithmetic. Such arithmetics are used to execute differential calculations and adaptive-beam-forming algorithms.

Traditionally, DSP makers have responded to higher-throughput requirements by increasing clock frequencies. This approach raises power consumption and heat dissipation. In contrast, Atmel has built a DSP architecture that delivers GFLOP-plus throughput at a low clock frequency. The mAgic core executes 15 operations per cycle in parallel. At only 100 MHz, it delivers 1.5 billion operations per second (GOPS) of which 1 billion are floating point. The core's low clock simplifies SoC timing closure and reduces the need for pipelining.

The 128-b instruction-word mAgic DSP has been architected to simultaneously execute mathematical operations on real and imaginary numbers. It includes 10 floating- and fixed-point operators (four multipliers and three adders and subtractors). They are arranged in two identical, parallel blocks. Data memory consists of 512 40-b registers, which are arranged in two banks of 256 registers each. A dedicated datapath exists between the two register banks. They can therefore be used as a single bank of 256 "complex registers" to simultaneously execute both real and imaginary arithmetic.

Another mAgic bonus is that it doesn't require that floating-point code be developed in MATLAB. Instead, code is developed on a PC and directly ported to mAgic. The mAgic core claims to be the market's only VLIW DSP to eliminate the difficulty of writing long (e.g., 128-b), highly parallel VLIW instructions. The macro-assembler optimizer automatically analyzes the logical and temporal data dependencies in serially written code. It then schedules all operations to optimize resource usage and pipeline depth.

Because of its ability to execute differential calculations and adaptive beam-forming algorithms, mAgic targets applications like spectrum analysis; audio encoding/decoding; missile cruise control; and auto collision avoidance. According to Pier Paolucci, mAgic's architect and a Permanent Researcher at the Italian National Institute of Nuclear Physics (INFN), mAgic also would work well in GSM base stations. With its capability to do beam forming from multiple antennae, it could increase reliability. Each channel could then potentially occupy a smaller band, thereby increasing the number of available channels. Hot spots or home networks serve as potential applications for mAgic as well.

The mAgic DSP core is available now for immediate SoC implementation. Atmel offers qualified customers an SoC Prototyping and Emulation Platform (PEP) board for system prototyping, emulation, and early code development.