Electronic Design

Host-Based ADSL Modem Halves Power And Cost

A software-based architecture allows the two-chip set to support multiple standards at the full ADSL rate.

The demand for inexpensive high-speed Internet access anytime and anywhere is accelerating, putting the onus upon notebook and laptop manufacturers to respond in kind. Service ubiquity and low costs have made V.90 modems, either as PC Cards or as fully embedded components, the solution of choice to date. But the recent surge in xDSL deployment has altered the service landscape. High-speed access, at theoretical rates of up to 8 Mbits/s, is now available almost everywhere.

This has been good news for manufacturers of traditional xDSL chip sets, which use a DSP from the likes of Lucent or Analog Devices at their core. These devices have cornered much of the desktop market, but the market dynamics are changing. Lower power for portability and lower cost for entry have been the rallying cries of the masses as they truck their laptops from home to work, or across state lines or country borders. Increased travel, with the availability of myriad xDSL service levels and standards such as G.dmt or G.lite, necessitates flexibility and on-the-fly adaptability.

These requirements motivated Integrated Telecom Express (ITeX) Inc. of Santa Clara, Calif., to introduce the first full-speed, ADSL chip set with a host-based architecture. This development promises to cut the cost and power requirements of a DSL implementation in half. Dubbed the Scalable ADSL Modem (SAM), it employs the unused cycles of a system's host CPU to perform much of the ADSL processing. Doing so reduces the required gate count to get ADSL into a PC by a factor of five, leading to the lower power and cost. At the same time, the architecture gives the chip set the flexibility to support multiple standards—including ITU G.dmt, ANSI T1.413, and ITU G.lite—at up to 8 Mbits/s downstream and 768 Mbits/s upstream. Also, any changes in the ADSL standards can be addressed in the field with a software download.

Targeting PCs, notebooks, PDAs, and Internet appliances, the chip set is one of many new peripherals that depend on the host CPU for processing power. That's not surprising, though. All of these peripherals are based on the premise that CPU power is growing faster than the demands of the applications being run on the average PC, currently represented by a 500-MHz Pentium III. With the availability of systems in excess of 1 GHz, the sweetspot will be advancing rapidly.

Consequently, there is plenty of room for new introductions, which include MPEG decoders for digital TV, encryption, and high-speed modems. The latest Intel Developers Forum only underscored this trend, as Intel indicated how the power of its CPUs at 1 GHz and above will be increasingly directed toward software implementations of peripherals. In turn, this should reduce the cost of high-speed Internet access.

Of course, using unused CPU clock cycles can have its disadvantages. When the system gets bogged down with advanced applications, service could possibly be lowered or interrupted. With the SAM, this is unlikely. Generally, the host CPU is relatively idle during most Internet transfers. For example, the SAM uses only 46% of a 500-MHz P-III processor to achieve 8-Mbit/s speed. The remaining 54% is ample enough for any other applications.

One of the SAM's key assets is its scalability. Processor use can be lowered to 35% to achieve the 6-Mbit/s rate, which is the fastest rate commonly available. Yet the standard ADSL service is 384 kbits/s downstream and 128 kbits/s upstream, requiring only 6% of a 500-MHz CPU's bandwidth. During idle-line periods, a patent-pending CPU cutback feature senses that there is no active data and lowers processor use to as low as 16% on an 8-Mbit/s line.

The combination of CPU cutback and the patent-granted auto-configuration make the SAM particularly attractive to notebook and laptop manufacturers. The former reduces power consumption, while the latter lets customers plug their system into any ADSL jack without knowing the central-office standard in use—anywhere in the world.

The SAM itself comes in three parts, namely the i80134 analog front end (AFE), the i90816 digital controller, and the SAM host software (Fig. 1).

The CMOS AFE contains two 12-bit digital-to-analog converters (DACs) with an 8.8-MHz sampling rate and a 13-bit, pipeline analog-to-digital converter (ADC), also with an 8.8-MHz sampling rate. The ADC's bandwidth is 1.1 MHz. The incoming signal is externally filtered for attenuation of speech, plain-old telephone-system (POTS) signaling, and attenuation of echo signaling. It's then amplified by a low-noise programmable-gain stage and low-pass filtered. This prevents anti-aliasing and eliminates out-of-band noise. The filter bank is software configurable between the ATU-R and ATU-C modes.

The incoming 12-bit data on the transmit side is converted to an analog signal and filtered. A predriver buffers the signal for the external line driver, and in case of a short loop, provides attenuation of −15 to 0 dB. The digital interface to the processor is four bits wide in a delicate balance between power requirements and the possibility of introducing noise on the PCI bus. In full flight, the AFE consumes 0.5 W off a 3.3-V supply.

The i90816 controller contains dedicated hardware blocks. The DSP front end features digital filters for interfacing with the i80134 AFE. It also has a decimation/interpolation filter and a time-domain equalizer (TEQ). An execution core, controlled by a state machine, performs the conversion from the time to the frequency domain. (FFTs and iFFTs). A PCI core handles bus-interfacing tasks. The rest of the ADSL processing is completed by the host, using the SAM driver software (Fig. 2).

The driver software is based on the NDIS network miniport-driver models for Windows operating-system platforms. It consists of ATM stacks, ADSL handshaking, a DMT data pump, a miniport-driver interface, and a hardware chip-set interface based on the various ADSL and ATM protocols.

The symbol-buffer interface takes symbols one by one from memory for processing. The SAM hardware management configures the ATM power-down modes and the ADSL configuration layer for controlling hardware and software for operation in the various modes. The ATM protocol stack and cell-buffer interface mediate between the synchronous ATM protocol and the asynchronous ADSL layer. Beside these, the ADSL/ATM management interface lets the application software configure and control the modem, power down, ADSL activation, and other features.

The protocol and management stack make the ADSL appear Ethernet-like. (The RFC 1577, an extension of the IEEE 802.3 MAC interface, is an interface layer between the IP and ATM stacks.) The SAM comes with the company's ADSL tool software for management, configuration, control, and remote diagnostics.

Devices such as the SAM should proliferate quickly as CPUs jump in performance. According to ITeX, ADSL modems based on this architecture will be embedded in motherboards later this year. The i80134 comes in a 64-pin LQFP, while the i90816 digital chip is housed in a 160-pin PQFP. Also, the host software comes on a CD-ROM as assembled Windows 95, 98, 2000, and NT 4.0 object code.

Price & Availability
The chip set, with host software, is available now. Pricing is $25 per 1000, falling to $18 in high volumes.

Integrated Telecom Express Inc., 2710 Walsh Ave., Santa Clara, CA 95051; Sales Dept., (408) 980-8689; www.itexinc.com.

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