Electronic Design

Initiative Pushes Use Of New FPGAs In Mainstream DSP Applications

Hoping to make field-programmable gate arrays (FPGAs) an attractive alternative for emerging DSP applications, Xilinx Inc. has launched a major initiative to broaden the devices' role in the DSP arena. With a firm commitment, Xilinx has announced the XtremeDSP initiative as a new strategy to propel FPGAs into mainstream DSP applications. The company has also unwrapped its plans to become a serious DSP solutions provider.

"We're at the beginning of a new information technology era; a convergence of consumer electronics, a communication infrastructure, and computer technology," says Will Strauss, president and founder of Forward Concepts. "With the increasing integration and performance capability of FPGA technology, it is enabling many new high-performance DSP applications within the area of broadband, such as wireless Internet, voice over IP (VoIP), and HDTV broadcasting."

Wim Roelandts, Xilinx's president and CEO, says, "With the XtremeDSP initiative, we are combining high-performance DSP solutions with our FPGAs, focusing our efforts toward developing innovative and complete solutions to meet the new DSP challenge."

The XtremeDSP initiative draws upon all the technologies within the company, notes Per Holmberg, product marketing manager for Xilinx. "Consequently," he adds, "a new-generation FPGA family like the Virtex II incorporates many unique DSP features. The goal is to deliver unprecedented performance that approaches 600 billion MAC (multiply-accumulate) operations per second."

Additionally, the supplier has developed new pre-engineered DSP algorithms as part of its LogiCORE library. It also has enabled system-level DSP development tools. To meet the DSP solutions of tomorrow, the initiative also includes a roadmap for high-level-language (HLL) design, new strategic industry and university partnerships, and acquisition plans to expand DSP research and development. Steps in that direction include Xilinx's partnership with The MathWorks to develop System Generator, as well as its acquisition of Lava Logic, a developer of synthesis technology based on Java/C++.

These developments are a result of several factors. Conventional DSPs are running out of steam for emerging broadband wireless systems. Extremely high-performance DSPs with a lot of on-chip parallelism are under development. Efficient high-level language compilers aren't readily available for new DSP architectures. And, time-to-market pressures and evolving standards are demanding quick and flexible solutions. With the XtremeDSP initiative, Xilinx believes it is in a unique position to exploit this situation.

"The new Virtex II features, combined with pre-engineered high-performance DSP algorithms and new DSP tools, will make the Virtex II architecture an ideal platform for high-performance DSP designs," asserts Chris Dick, Xilinx's chief DSP architect. "Designers can use Virtex II devices to implement critical DSP elements of emerging broadband systems such as under-1-µs 1024-point FFTs, hyperfast adaptive filters, 3G turbo coders, rake receivers, and spread spectrum."

Eleven new LogiCORE DSP algorithms have been released for implementing data-communication and image-processing applications. One of these products is a filter generator, integrated with MATLAB from The MathWorks. This generator lets customers design sophisticated filter algorithms using industry-standard tools. Customers also can use it to automatically generate an optimized implementation for Xilinx FPGAs.

The other new LogiCORE releases include a multiplier generator, a parameterized MAC, a DCT/iDCT function, three G.711 PCM codec cores, and four color-space converters. Also, Xilinx is offering the System Generator for The MathWorks' Simulink DSP designer, which shortens the design and implementation cycle.

XPower, Xilinx's interactive tool, lets designers analyze the power effects of design tradeoffs during the design cycle. Designers of power-critical DSP devices, such as handheld portable and large-scale applications, can now accurately estimate chip power consumption. By utilizing internal device characterization data, XPower provides a more accurate estimation than typical static power-calculation forms offered by most PLD vendors. Future XPower releases also will provide HDL simulation data to further improve accuracy.

DSP enhancements for Xilinx's integrated logic analyzer (ILA) ChipScope permit real-time access to any node in the FPGA with an easy-to-use graphical interface. These enhancements will enable designers to plot real digital signals on the chip in two-dimensional diagrams. This capability is extremely important considering today's complex devices and leadless packages.

Offering up to 10 million system gates, the Virtex II architecture includes a number of new features aimed at removing bottlenecks in high-performance DSP systems. These improvements will include up to 192 dedicated high-speed multipliers and true dual-port block RAM extended up to 3.5 Mbits in a single FPGA (see the figure). Initial devices in Virtex II will be fabricated in 0.15-µm CMOS with a 1.5-V supply. The architecture is optimized for rapid migration to a 100-nm process technology.

The Virtex II multipliers will support up to 18-bit signed or up to 17-bit unsigned representation. And, they can be cascaded to support bigger numbers. They are fully combinatorial, running between 140 and 250 MHz, depending on bit width. Designers can use up to 192 multipliers to implement an array of 18 by 18 MAC capability. Or, they can use each multiplier primitive to implement two smaller multipliers, forming up to 384 MAC units on a single FPGA. The MAC is a fundamental DSP building block. In comparison, traditional DSP solutions typically support up to four MACs on a single chip.

For more information, visit the company's Web site at www.xilinx.com.

TAGS: Digital ICs
Hide comments

Comments

  • Allowed HTML tags: <em> <strong> <blockquote> <br> <p>

Plain text

  • No HTML tags allowed.
  • Web page addresses and e-mail addresses turn into links automatically.
  • Lines and paragraphs break automatically.
Publish