Electronic Design

Power Estimator Lets Designers Make Smart Energy-Saving Tradeoffs

To address the growing need to pro-actively reduce power consumption in embedded systems, the Xenergy estimator from Tensilica Inc. allows designers to optimize energy usage early in the system-on-chip (SoC) design cycle. Using Xenergy, designers working with either the Xtensa configurable processor or the Diamond Standard processor can cut processor and local memory energy requirements by up to half by making intelligent design tradeoffs. This will not only help designers of portable, battery-powered systems, but also those working on complex SoCs for home entertainment and networking devices, where heat is becoming an important issue. The estimator determines the overall energy impact of different processor configurations and extensions, and offers application-code tuning on each processor and its memory subsystem.

Xenergy works by computing a power-consumption estimation per-cycle for each different instruction of an Xtensa configurable processor or Diamond Standard processor. For each user-defined instruction extension in an Xtensa processor, created using the Tensilica Instruction Extension (TIE) language, Xenergy produces an energy estimate for the newly created instruction, including modeling the energy consumed by all locally attached memories that are active for a given instruction. Then, using the instruction profile created by Tensilica's pipeline-accurate instruction set simulator, a detailed energy consumption profile is created for the user's specific application code. A focus on total energy consumption is the key. Too often, designers will focus on a static milliwatts-per-megahertz power figure, but ignore the total energy consumption of the workload.

AVAILABILITY

The Xenergy tool is available now as part of a Tensilica Software Development Kit license, which includes all software development tools, the instruction set simulator, and the Xtensa Xplorer design environment.

PRICING

For users of the Diamond Standard series of processors, the Software Development Kit starts at $1000 per seat per year for a node-locked license. For Xtensa processor users, the kit starts at $2000 per seat per year for a floating-node tool seat.

FOR MORE INFORMATION

Visit www.tensilica.com.

TAGS: Digital ICs
Hide comments

Comments

  • Allowed HTML tags: <em> <strong> <blockquote> <br> <p>

Plain text

  • No HTML tags allowed.
  • Web page addresses and e-mail addresses turn into links automatically.
  • Lines and paragraphs break automatically.
Publish