Tapping the transistor-level optimization and analysis expertise at Synopsys Inc., Mountain View, Calif., developers at the StarCore Technology Center in Atlanta, Ga., have crafted a proprietary design methodology for SC100-family DSP cores. Their joint effort has produced a unique DSP design flow known as the StarCore design system (SCDS).
This methodology blends the benefits of synthesizable and custom approaches to automate the custom design flow. It also lets designers quickly and easily retarget SC100/140 DSP cores to next-generation process technologies with optimized speed and area. And, it's flexible enough to optimize transistors by trading off frequency, power, dissipation, and size within the same process.
Using commercially available EDA tools, the SCDS methodology accomplishes custom-design performance with the time-to-market advantages of a standard-cell design. According to Scott Beach, StarCore's SC100 platform marketing manager, the SCDS flow and related tools are being transferred to StarCore partners Lucent Technologies and Motorola Inc. StarCore is a cooperative research and development initiative between Lucent and Motorola.
The underlying commercial tools used to automate the SCDS include AMPS, a circuit-layout optimization tool, and PathMill static-timing analysis software. The Design Compiler family of tools, also featured, improves quality and reduces design iterations. Synopsys engineers used these basic design tools to achieve the unique requirements of automating SCDS, along with the optimization of transistors for a specific deep-submicron CMOS process.
With that goal in mind, the developers also have created a proprietary parametric library (see the figure). The StarCore partners will now port this scheme to their respective system-on-a-chip (SoC) design flows to generate the system-level solution around the SC140 DSP core in the most appropriate process available.
For more information about StarCore, visit www.starcore-dsp.com.