Crossover Micro Pushes into Application-Processor Space

Crossover Micro Pushes into Application-Processor Space

NXP’s Cortex-M7-based i.MX RT1050 crossover microcontroller contains many of the interfaces found in higher-end Cortex-A chips.

NXP considers its Cortex-M7-based i.MX RT1050 (Fig. 1) a crossover platform between the typical Cortex-M microcontroller and the application-oriented Cortex-A chips on the market. The chip family includes higher-end security and peripheral support, which is less common in microcontrollers.

1. NXP’s i.MX RT1050 is based on a 600-MHz Cortex-M7 with up to 512 kB of tightly coupled memory (TCM), secure-boot support, and user-interface peripherals.

The 600-MHz core can be surrounded with up to 512 kB of tightly coupled memory (TCM) and it boots from off-chip memory. This is typical of higher-end platforms that use operating systems like Linux. The Cortex-M7 platform will not support Linux, but it does handle a wider range of real-time operating systems like FreeRTOS, Express Logic’s ThreadX, and ARM mbedOS.

The i.MX RT platform also includes instruction and data caches. It provides the standard Arm Cortex-M memory protection, and integrates AES-128 encryption support. Performance clocks in at 3020 EMMBC CoreMarks using 110 µA/MHz at 3.3 V.

The chips support secure boot from off-chip QSPI flash memory devices. The 2-MB QSPI flash devices are common and inexpensive, with capacities topping off at 16 MB. That’s a lot of storage in a small package. QSPI flash has other advantages, too, including faster programming than on-chip flash.

Off-chip memory also reduces the number of SKUs, as many microcontrollers differ simply by the amount of on-chip memory. Furthermore, there’s support for off-chip SDRAM.

The off-chip flash can be encrypted, because the i.MX RT can decrypt code on the fly. It also supports eXecute-In-Place (XIP), where code can be fetched directly from off-chip flash. Code will typically be copied into TCM, but that’s not a requirement. All NXP microcontrollers now have unique IDs.

The systems still lean to the microcontroller side, which is a good thing for applications that need real-time support. Its interrupt latency is only 20 ns.

Peripheral support includes multimedia output with a 2D graphics engine. It can handle LCD displays of up to 1366 by 768 pixels. Three I2S manage multichannel high-performance audio. There’s also a camera interface.

The microcontroller connectivity collection offers the typical range from I2C to SPI. CAN, Ethernet, and USB 2.0 are also part of the mix.

The i.MX RT is designed to reduce the overall bill of materials (BOM) for a system. Its 10- by 10-ball BGA works well with 2- and 4-layer printed circuit boards (PCBs). And an on-chip PMIC features a dc-dc converter.

2. The i.MX RT1050 EVK features a 4-layer, through-hole board that hosts the 600-MHz Cortex-M7 crossover microcontroller.

Developers can get started with the i.MX RT1050 EVK evaluation kit (Fig. 2). It uses a 4-layer, through-hole board that highlights the simplified PCB layout possible with this crossover platform, compared to the usually more complex Cortex-A platforms. The board hosts the 600-MHz crossover microcontroller.

Quantity pricing starts at $2.98.

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