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Electronicdesign 19227 Techcon Efpga Promo
Electronicdesign 19227 Techcon Efpga Promo
Electronicdesign 19227 Techcon Efpga Promo
Electronicdesign 19227 Techcon Efpga Promo
Electronicdesign 19227 Techcon Efpga Promo

Flurry of eFPGAs Invades Arm TechCon

Nov. 4, 2017
This year’s conference played host to a number of new embedded FPGA announcements, including support for custom blocks.

It didn’t take long to realize that embedded FPGAs (eFPGAs) were hot commodities at Arm TechCon 2017. Silicon foundries like GLOBALFOUNDRIES and TSMC provide support for these solutions, allowing developers to incorporate eFPGAs into their designs.

Adding eFPGAs is a simple matter for applications that just need to move the FPGA inside a system-on-chip (SoC). This opens the door to a number of benefits, including reducing the size of the FPGA, because such an approach eliminates the I/O normally used to move data between the FPGA and a host (Fig. 1).

1. Embedded FPGAs (eFPGAs) can save significant space and power compared to conventional, standalone FPGAs by eliminating much of the I/O needed for a separate chip. It also provides a higher bandwidth connection to the host.

An eFPGA also allows developers to get just the amount of FPGAs needed for an application, as well as specifying the mix of resources, such as DSP blocks in addition to the usual lookup tables (LUTs).

To expand the eFPGA’s capabilities, Achronix Semiconductor’s Speedcore enables developers to include their own custom blocks within the eFPGA (Fig. 2). The blocks must be a multiple of the LUT block size, so that they can be stacked within the FGPA fabric. The same FPGA routing connectivity is provided to the custom blocks.

2. Achronix’s Speedcore allows custom blocks to be defined and included in eFPGA columns.

One interesting approach made possible with Speedcore custom blocks is the ability to move data through the custom blocks without using the FPGA fabric. It reduces fabric connectivity overhead and significantly increases the speed of the system, allowing it to handle 100G and 400G Ethernet streams. This goes beyond the capabilities of conventional FPGAs, even Achronix’s high-speed standalone solutions.

Flex Logix was showing off a new test chip that included two eFPGA blocks (Fig. 3). One block is designed to provide a fixed function, while the other is used as a conventional FPGA.

3. Flex Logix’s test chip (center, under heat sink) partitions the FPGA with a programmable fabric and Cortex-M0, also implemented in the FPGA fabric.

The fixed-function block contains an Arm Cortex-M0 implemented in the FPGA fabric (Fig. 4). The block also incorporates the typical microcontroller peripheral complement, including a quad SPI (QSPI) interface. Flex Logix also announced support for RISC-V cores. The test chip could easily replace the Cortex-M0 with a RISC-V core, since the block is an FPGA.

4. Two eFPGA arrays are incorporated into Flex Logix’s test chip. One is dedicated to an Arm Cortex-M0 and its peripherals.

Menta had its eFPGA recently qualified with GLOBALFOUNDRIES’ 14-nm FinFET and 32-nm SOI processes, and backed its low-power SRAM with TSMC’s 28-nm process. Menta supports custom eFPGAs and has predefined eFPGAs available to developers. In addition, it supports custom embedded logic blocks (eLBs), embedded custom blocks (eCBs), and embedded memory blocks (eMBs). Its​Origami Programmer tool takes RTL code in VHDL, Verilog, or System-Verilog formats and performs standard design flow of synthesis, mapping, and place and route with or without constraints.

QuickLogic ArticPro is an ultra-low-power eFPGA. Its fine-grain architecture has LUTs that can be configured as two independent three-input LUTs (LUT3) or four-input LUTs (LUT4). The 8:1 multiplexer can also be changed to a pair of independent 2:1 multiplexers; there’s an optional flip-flop as well.

The Aurora tool developed by QuickLogic handles place and route. It takes advantage of Mentor Graphics’ Precision for synthesis, and works with a range of industry-standard simulators, including NC-Sim, VCS, Questa, and ModelSim. QuickLogic’s Borealis eFPGA compiler handles generation of netlists for final integration.

An eFPGA adds complexity to a SoC, but its flexibility allows in-field upgrades as well as customization and performance that’s unavailable via software. Developers can tailor eFGPAs to their requirements and include as much headroom as desired for future enhancements and changes. Dealing with an eFPGA tends to be easier than an external FPGA, since a fixed configuration surrounds the FPGA fabric.

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