The Semiconductor Bridge: A Connected IPLM

The Semiconductor Bridge: A Connected IPLM

Development processes in large semiconductor organizations need to scale, and they can do so by adopting the same flexibility and agile principles as software companies.

The development processes in large semiconductor organizations have not scaled well from their beginnings of small teams working on a single design. Now that design teams are globally dispersed, working on true “systems” on a chip (SoCs), an inability to keep teams in sync within sprawling projects has hampered industry flexibility, time-to-market goals, and meeting development budgets.

“The dangling carrot has always been for semiconductor development to keep pace with quickly evolving software-development methods,” says Jerry Brocklehurst, Methodics VP of Worldwide Sales & Marketing. 

But how conceivable is that goal when hardware design alterations result in million-dollar fabrication costs, put your product at compliance risk, and jeopardize hard-earned quality and efficiency?

Furthermore, semiconductor organizations must optimize between unique divisions of labor, as analog designers tasked with fabricating complex circuit designs operate independently from digital teams working the same project. While analog teams generate large data sets of binary files, the digital teams focus on register-transfer level (RTL) development, aligning more closely with the traditional software workflows of those working on embedded software, focusing on file management and interfaces.

Semiconductor companies are feeling the crunch to achieve shorter time-to-market on projects with greater technological demands. The cost of these SoC projects has always been steep, and now consumer demands are driving costs even higher while, at the same time, driving end-product prices lower.

To cope with these market pressures, large monolithic organizations have struggled to adopt development methodologies more suited for the world of software. However, hardware development teams are using outdated and proprietary design-management (DM) tools, offering an antiquated single-project/single-server model that has simply become untenable. At the same time, software-development teams have moved on to more “agile” methodologies to work more collaboratively among cross-functional teams and increase flexibility and efficiency.

At one time this approach worked suitably, with older technology in those bygone projects limited in scale and performance requirements. But now, with larger project capabilities and technological demands, organizations look to outsource to third-party tooling to help accelerate semiconductor workflows, bringing greater efficiency to the table under the banner of a unified IP Lifecycle Management (IPLM) tool. This comprehensive intellectual-property (IP) and workspace-management approach offers industry-leading lifecycle management and platform-based design, built atop an enterprise-grade file-versioning platform.

But is it realistic for semiconductor companies to adopt the same flexibility and agile principles that have revolutionized the software realm? And if so, can they mitigate the risk of million-dollar losses due to engineering and fabrication alterations?

Industry experts are doing just that by granting development teams complete organizational control over the design and integration of both internal and external design elements, whether it’s new analog or digital designs, or standalone IP.

“There are some creative strategies which reward semiconductor organizations with the same iteration and innovation speed of software development,” says Brocklehurst. In addition, an IPLM tool can improve product-development quality, reduce compliance risk, and add project efficiency.

Semiconductor organizations must support different product workflows. On one side, analog circuit designers create binary file assets that most versioning engines don’t handle well, if at all. Digital designers not only are creating multitudes of RTL files, but design artifact files as well, such as design and timing constraint files, verification testbenches, and coverage files. Embedded software teams have code, library, and object files, often for multiple platforms that all have separate configurations.

“Finding that platform that can ‘play nice’ with all file sizes and types within these two converging worlds is the goal,” says Brocklehurst. “That is the customer imperative we facilitate to increase efficiency and reduce costs.”

Though most teams prefer their specific approaches and are happiest when their separate worlds stay siloed, this simply isn’t viable in today’s workplace, where multiple design teams come together to create a larger product. Luckily, with easier integrations using enterprise IPLM tools, neither team has to leave their preferred design environment to utilize some other tool for versioning. And with an optimized federated architecture, modern IPLM systems are built to support project scaling with rapidly propagated changes across the globe.

The specific methodology challenges are as unique and fluid as the organization adopting them. The main focus, though, is how to best reuse IP to reduce risk, improve quality and efficiency, and iterate faster.

Don’t Reinvent the Wheel: Implement an IP Reuse Strategy to Connect Distributed Teams

The decision-makers driving semiconductor organizations are realizing that tried-and-true methodologies of the past are running out of steam, and there aren’t many Band-Aids left to keep them functioning, even marginally. Meanwhile, their software counterparts have been moving forward with new methodologies that increase productivity.

Semiconductor design has always been expensive, but now margins are squeezed even tighter with design managers seeking creative ways to gain a competitive edge. With a lack of efficiently finding design data posing an increasing risk to compliance and overall efficiency, the challenge within semiconductor organizations has become how to iterate products faster while maintaining a precise history of all IP and metadata.

More and more, product-development cycles are implementing IP reuse strategies, or the concept that key functional blocks of IP can be used over-and-over again—so-called “component-based development” (CBD) in software-development circles.

 “A CBD methodology allows organizations to iterate far quicker than before,” says Brocklehurst. “With functional blocks of reuse data in place, customers are seeing marked improvements in speed, traceability, and stability.”

The aim is to connect distributed teams within a single source of truth, as organizational components are stored, cataloged, and tracked for usage of design and metadata across the enterprise. The end result is to maintain a searchable database of every component developed by the organization.

Previously, semiconductor organizations approached capturing design data in an ad hoc fashion, leaving room for communication breakdowns between teams or, worse still, complete inability of reuse. And because of this, teams wasted a lot of their time reproducing work along the way. These processes can now be automated with the help of CBD.

Once deployed, CBD provides organizational access to an IPLM platform. This enables companies of all sizes to have complete control over the design and integration of both internal and external design elements, including libraries, new analog and digital design, and standalone IP.

Thus, organizations spend less time reinventing the wheel, so to speak, and gain added efficiency by repurposing all the work they’ve already crafted. This is the basic component of platform-based design (more on that later).

Standard Methodology Provides a Reliable, Single Source of Truth

To curb dwindling time and rising costs, unified IPLM platforms help semiconductor companies implement formal methodologies around data storage, design, and artifacts. This creates a systemic approach to tracking IP and controlling its use.

A centralized IP repository governed by an IPLM has the ability to track where IP was used and who used it, across all projects. This granular visibility of IP ensures that global teams can be certain they have the most updated IP block, as new releases and bug fixes are communicated when they become available. This creates significantly improves design time-to-market and team efficiency.

Design managers can also implement standards to lock design data, whether it’s being edited or saved as text or binary files, and quickly propagate those changes around the world. This fosters a unified development cycle that doesn’t waste time, as distributed teams across the globe have working access 24/7.

“High-quality project visibility helps mitigate developmental risk—like running afoul of compliance standards,” says Brocklehurst. “And built-in versioning supports all project files.” A federated server architecture ensures the whole process is high-performance right out of the box.

The traceability and speed of a dedicated comprehensive IPLM not only reduces resource costs and management overhead, but it helps reinforce stability in everything you do.

Formalize IP with a Platform-Based Design Methodology

Platform-based design methodologies allow companies to reduce the time it takes to bring designs to market and maximize reuse of internal IP on those designs. A platform is the starting point for a new or derivative design that contains all of the IP and design metadata properly configured to be downloaded to a user's workspace.

To enable a platform-based design methodology, companies must formalize how design IP is handled. IPLM tooling helps companies enable platform-based development environments for their projects. A comprehensive IPLM tool provides useful IP, which is crucial throughout the design and use stages, and it also documents exactly how IP is used across multiple projects.

Developing an integrated approach that makes complex products easier to manage is the goal. The systematic reuse of IP into platform-compatible hardware and software components is the method. A unified IPLM is the tool. That’s because corporate attrition often robs teams of the bandwidth required to operate multiple tools. One dedicated tool can support a concurrent design approach while simplifying and streamlining semiconductor work environments.

“We’ve found that our customers prefer a platform solution over third-party tooling,” says Brocklehurst. “They simply can’t afford to surrender speed-to-market because of inadequate visibility across the enterprise.”

The most optimal platform-based design systems strike a precise balance between refinement (the IP packages that are vetted and reused) and abstract implementations (the fresh IP that will be built atop your legacy IP).

More and more product managers are harnessing unified platforms that execute their functions with semiconductors in mind. These teams can eliminate the excessive reliance on third-party tools, which often obstruct efficiency.

Ultimately, semiconductor teams can deliver products featuring complex technologies and combat market pressures by leveraging a maximum degree of IP platforms for reuse and an overall simplification of product-development environments, from one dedicated IPLM.

Central Repositories Help Semiconductor Companies Embrace Agile Development Cycles

Semiconductor organizations are capable of keeping up with agile software cycles in ways they recently couldn’t. But it takes a deft touch and systematic efforts to integrate your project environments into a single-view system, especially if you’re relying on ad hoc tooling methods that stitch operations together.

A central repository of platform IP, versioned and secured, can be used to reduce time waste and bolster speed-to-market for semiconductor projects. Each IP block is vetted for long-term stability, and subsequently reused for derivative designs. This luxury keeps your personnel working on the fresh aspects of your build while managing the rote IP assets, ensuring they’re bug-free and compliance-ready when you need them.

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