Microchip needed to move into the 32-bit space, which was encroaching on its 8- and 16- bit market. But the company didn’t follow the line of ARM adopters. Instead, it looked at the silicon landscape and chose MIPS Technologies’ M4K core to herald its entry into this competitive space (Fig. 1). It has lots of company, too.
Almost all of ARM’s licensees are adopting its Cortex-M3 with standard parts for its low-end, 32-bit model. Meanwhile, established 32-bit platforms like Freescale’s Coldfire continue to compete at the low end.
Microchip isn’t the only company to recently release a new 32-bit platform. Atmel also has chimed in with the AVR32 and its completely new architecture.
MAKING A MIPS MICRO
Microchip’s initial offering, the PIC32MX3xx, is based on a 72-MHz MIPS32 M4K core (see tables 1 and 2). The core is built using the base MIPS low-power core with a five-stage pipeline. The flash memory has a basic prefetch cache. There’s a separate 12-kbyte boot flash area as well. Also, operating systems can lock and load cache entries. Both flash memory areas support Microchip’s code protection system.
The new chips deliver a significant power boost, raising the bar on Microchip’s product line. With features like the singlecycle multiply and high-performance divide unit, designers can tackle more ambitious computational applications.
The chip’s basic memory management unit (MMU) includes a 4-Gbyte virtual address space. A fast fixed-memory translation unit maps four areas—kernel code/data and user data/code. The fourchannel DMA integrates cyclic redundancy checking (CRC). The channels also can run while the processor is in idle mode. The PIC32’s vectored interrupt controller supports up to 63 interrupts. A full shadow register set permits an immediate switch to interrupt mode, too.
The PIC32’s debug capabilities are a step up from Microchip’s standard offerings, with eight hardware breakpoints that can be combined and cascaded. Microchip’s two-wire debug interface works with the PIC32 in addition to JTAG.
A full trace capability utilizes MIPS Technologies’ hardwarebased trace-compression facility, which can substantially reduce trace storage requirements. The trace interface employs five pins that can be used for other purposes if trace isn’t enabled.
MELDING 8 BITS AND
The PIC32 line shares peripheral interface blocks with its 8- and 16-bit siblings. This allows for easier migration between platforms, especially if applications are written in C. Such consistency isn’t new, though. NEC Electronics was one of the first companies to achieve it, concentrating on hardware compatibility.
Freescale’s Controller Continuum effort sports the 32-bit Coldfire architecture, which moves even higher in the 32-bit space, though many of those peripherals aren’t shared with the lower-end instances. Freescale’s CodeWarrior tied the 8- and 16-bit platforms together. Microchip takes this approach as well. Its MPLAB integrated development environment (IDE) makes migration as easy as a selection change and rebuild.
One typical peripheral, the 16-channel, 10-bit analog-to-digital converter (ADC), operates at a 400-ksample/s rate and can run during processor sleep or idle modes (Fig. 2). A pair of comparators complements the ADC. Likewise, the pair of UARTs has LIN and IrDA support.
Software was never an issue, since the MIPS32 architecture is well-supported. All of these tools were tuned for the PIC32, giving developers a range of IDEs, operating systems, and middleware.
Microchip’s USB-powered PIC32 Starter Kit includes the development module and the MPLAB IDE v8.00 (Fig. 3). The IDE comes with the C32 Student Edition. The module plugs into optional expansion boards. Modules also are available for the Explorer 16 development board.
The PICMX300 starts at $2.95. It comes in 64- and 100-pin thin quad flat packs (TQFPs). The PIC32 Starter Kit costs $49.