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Development Tool Accelerates Simulation Speed For Xilinx PGAs

Developed for Xilinx devices, the Active-HDL 4.2XE achieves a 40% increase in simulation speed over the previous 4.0XE version. Users now have the ability to seamlessly import Xilinx Foundation Series projects, schematics and libraries directly into an HDL verification environment. Once imported, the schematics and other files can be used, preserving all graphics, attributes, hierarchy structure and settings. Active-HDL 4.2XE enables reuse of previously designed schematics, ABEL files, LogiBlox and CoreGen modules, and Netlists in an HDL environment, in order to retarget these for the newest Xilinx device families. The new product gives users unrestricted VHDL or Verilog simulation supporting all Xilinx device families and the latest Xilinx Virtex-II devices. Additionally, the SIMPRIM library is built into the Active-HDL simulation kernel to increase timing simulation over the Foundation Series by 50 times. Active-HDL 4.2XE software supports logic synthesis from Exemplar, Synplicity, Synopsis and Xilinx Synthesis Technology directly from its Flow Manager. Pricing is $2,995.

Company: ALDEC

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