Electronic Design

DSL Solutions Integrate Layers 1 Through 3 To Whittle Down Cost And Save On Space

It's becoming apparent that this year will mark the coming of age of digital-subscriber-line (DSL) technology. With predictions for Bell Atlantic alone ranging from 500,000 subscribers this year to 7 million by 2004, it's hard to believe anything can stand in its way. This progress should continue even in spite of an ever-improving cable data feed and the prospect of two-way satellite connections without the use of a phone line by year's end.

Many reasons exist for DSL's popularity. But they mainly revolve around its use of an existing infrastructure to reach downstream rates of up to 8 Mbits/s. However, the technology has been somewhat of a victim of its own success, in the sense that rising competition has minimized profit margins for equipment manufacturers. Most boxes are shipping at barely above their bill of materials (BOM). As a result, IC manufacturers should improve integration levels to reduce the BOM while offering improved software support to speed overall time-to-market.

At the forefront of companies responding to this need, Virata Corp. has introduced two asymmetric DSL (ADSL) chip solutions that are the first to fully integrate layers 1, 2, and 3. Layer 1, the physical (or transceiver) layer, has been left to itself. Layers 2 and 3, the framing and IP routing layers, respectively, typically would have been integrated separately.

Available in two flavors, Virata's chips are designed to lower the cost, improve the performance, and speed the development of advanced ADSL solutions. According to Duncan Greatwood, vice president of marketing at Virata, "Both chips are feature rich, have a flexible architecture for new applications such as voice and security, and are perfectly suited to the emerging Internet Access Devices (IADs)." These devices support multiple phone lines over a single copper wire while connecting all of the PCs in the home over one network.

The first device, Boron, comes with PCI and USB interfaces. It includes its own on-chip ATM, thereby negating the need for the PC to handle segmentation and reassembly (SAR) functions. It's the first PCI-based chip to include both G.992.1 (full-rate ADSL) and G.991.2 (G.lite) rates. An autosensing feature makes it adaptable to either system, as well. Boron integrates a V.90/V.Fax modem, and it comes in a 256-pin plastic PGA.

The second chip, Beryllium, targets the home gateway function. It comes with all of the features included with its Boron cousin, while adding an on-chip 10/100 media access controller with a media-independent interface. This allows the device to port—via software—to any of the home networking protocols.

Other features include a highly flexible expansion capability, ADSL bit-alignment support, and bandwidth reuse, which is key here. When multiple channels are in use, the controller will usually assign a fixed bandwidth to each, regardless of whether or not the channels are in use simultaneously. Bandwidth reuse detects when one channel isn't being fully used, and it dynamically assigns the remaining channels with increased bandwidth to speed their throughput. The Beryllium is packaged in a 316-pin plastic PGA.

Forming the analog front end is the company's Neon chip, which also has been redesigned to improve its ability to mitigate line effects. Pricing for the Boron and Neon is under $25 each, and pricing for the Beryllium and Neon is under $30 each, in OEM quantities. The devices are sampling now, with production quantities scheduled for delivery by June.

Virata Corp., 2933 Bunker Hill Lane, Ste. 201, Santa Clara, CA 95054; Dan Karr, (408) 566-1005; fax (408) 980-8250; e-mail: [email protected]; www.virata.com.

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