Electronic Design

Ethernet MAC And PHY

Sponsored by: FREESCALE SEMICONDUCTOR

How do you implement a single-chip Ethernet microcontroller?

The trick is to incorporate the microcontroller, Ethernet MAC, and PHY on a single chip, thereby eliminating most external components. This enables the MAC and PHY to be matched and reduces the overall pin count and chip footprint. It can also lower power consumption, especially if power-down modes are implemented.

What is an Ethernet MAC?

The MAC is the media access controller. The Ethernet MAC is defined by the IEEE-802.3 Ethernet standard. It implements a data-link layer. The latest MACs support operation at both 10 Mbits/s and 100 Mbits/s. This crop typically implements the MII.

What is the MII?

The Media Independent Interface (MII) is an Ethernet industry standard defined in IEEE 802.3. It consists of a data interface and a management interface between a MAC and a PHY (Fig. 1). The data interface consists of a channel for the transmitter and a separate channel for the receiver. Each channel has its own clock, data, and control signals. The MII data interface requires a total of 16 signals. The management interface is a two-signal interface-one signal for clocking and the other for data. With the management interface, upper layers can monitor and control the PHY.

What is an Ethernet PHY?

The PHY is the physical interface transceiver. It implements the physical layer. The IEEE-802.3 standard defines the Ethernet PHY. It complies with the IEEE-802.3 specifications for 10BaseT (clause 14) and 100BaseTX (clauses 24 and 25).

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