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RISC-V Architecture: Path to Mainstream Likely to be a Bit of a Slog

Despite the benefits, engineers discuss why RISC-V isn’t quite ready for primetime for their applications—although the architecture’s primary challenge may be gaining mindshare among engineers.

The introduction of SiFive’s Freedom E310 RISC-V chip in 2016 and announcements at last week’s Embedded World by Microsemi, Antmicro, and UltraSoC are helping raise the profile of RISC-V, an open processor Instruction Set Architecture (ISA).

Originally developed at the Computer Science Division of the EECS Department at the University of California, Berkeley, the story of RISC-V underscores the challenges in entering the mainstream: first capturing the mindshare of engineers, and then making a persuasive-enough argument about the positive trade-offs to make inroads in displacing the current ARM, MIPS, and Intel incumbents.

Unacceptable trade-offs is one issue. Granted, for those engineers with some knowledge of RISC-V, there is mixed reaction about its potential, ranging from “I’m ready to sign up now!” (15%) to “Not ready for prime time.” (30%).

However, lack of mindshare may be the bigger issue: In a recent Electronic Design survey of embedded developers, only 21% responded that they were familiar with the RISC-V architecture. More than a third indicated they have heard of it in name only.<

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Among the practicing engineers we spoke with who have more than a passing familiarity with the architecture, the jury is still out on RISC-V.

“RISC-V does seem to be gaining momentum, and if I understand correctly it will be available under the OPEN BSD, but one of the strong trends that the industry (hardware and software) is facing and is yet unsure of how to deal with is open source,” said Adam Taylor. An engineer, he has used FPGAs to implement a wide variety of solutions from RADAR to safety critical control systems. He is also the owner of the engineering and consultancy company Adiuvo Engineering and Training.

He likes the idea that RISC-V offers a lot of options and there is no royalty or NDA requirements standing in the way of trying it out in your own FPGA. But he wonders whether a general wariness around open source and understanding the impact it has on the end product (does it copyleft, for instance?) will hinder its adoption by commercial companies.

Another aspect likely to slow acceptance is the availability of tool chains to support development, with nearly a third of the respondents in our survey agreeing that is the case.

“I think tools are the bit that everyone always glosses over,” Taylor stressed. “The reality is that the silicon is easy to deal with, as compared to the requirement for an integrated and functional tool chain that works and is productive. This is very important as it cannot be clunky, as is the case with some academic tools.”
Matt Liberty, CEO of Jetperch LLC—a DSP, FPGA, and embedded software consulting firm—said that the value proposition of RISC-V simply isn’t yet strong enough for engineers.

“Why would engineers invest the time to learn something new, if they are using an architecture that’s already doing its job?” Liberty asked. “They’re likely being pushed by their managers to deliver on schedule, and that’s where they are going to be focusing their efforts.”

Liberty also pointed to the huge variety of ARM processors available from every major silicon vendor, and the strong likelihood that engineers can already get the features they need from current offerings. “I think that RISC-V has a major uphill battle because of the huge installed base of ARM, where the users know the products inside and out,” he concluded.

Liberty also is skeptical of the claim that no licensing fees will be a big draw. “The fees for the Cortex M family are not that high, and they really don’t add a lot of cost to the processor or the product,” he explained. “So there really need to be other compelling benefits.”

Notwithstanding that he thinks the journey to critical mass will be somewhat a slog, Taylor is enthusiastic about the idea of big names jumping into the RISC-V space. “Assuming it is done properly and it is not just about making supportive noises, RISC-V could make a big impact in the FPGA world,” he noted.

Academia itself may well speed up adoption rates, said Taylor, noting that engineers have a tendency to rely on what they first learned in school: “RISC-V makes for an ideal teaching platform for the next-generation electronic engineering students, allowing them to look deep into the internals, learn, and understand. This is bound to help push the technology into the commercial space—albeit a slow push.”

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