Electronic Design

Signal Integrity Gets The Plug & Play Treatment

It’s hard to beat plug & play as a hot buzzword over the past few years. Often, the term conjures up images of Microsoft Windows. Now, Altera is getting into the mix with Plug & Play Signal Integrity. The company’s hot-swappable FPGA device uses low-power linear adaptive equalization technology—Altera’s Adaptive Dispersion Compensation Engine (ADCE).

Plug & Play Signal Integrity gives system architects hot-socketable Stratix II GX FPGAs that monitor signal quality and compensate for degradation in multigigabit system interconnects caused by a variety of typical conditions, including manufacturing, voltage, temperature, and design variations.

It beefs up signal integrity by continuously adjusting equalizer settings for up to 20 receivers to provide the best eye opening for non-return-to-zero (NRZ) signals operating between 2.5 and 6.375 Gbits/s (see the figure). The end result is improved system reliability and performance, as well as reduced bit error rate (BER).

When hot-swapping a card configuration in a backplane, the ADCE monitors signals with up to –17 dB of interconnect loss at the Nyquist frequency and adjusts the receiver’s equalizer for maximum eye opening without typically requiring any pre-emphasis. Yet because Altera’s Stratix II GX devices were built with signal integrity in mind, the combination of ADCE and pre-emphasis generally results in very low BER operation for systems with up to –27 dB of loss.

With the technology, users can design their systems with universal cards that plug into any position in a backplane. The implications include fewer card types, increased flexibility, and reduced maintenance and testing since characterization of each card slot for the optimal signal integrity will no longer be necessary.

“Altera continues to deliver FPGA transceiver innovation to customers by providing system designers with the only plug-and-play signal-integrity capability available in an FPGA,” said Danny Biran, senior VP of product and corporate marketing at Altera.

“Our FPGAs’ ability to plug into a powered system and automatically adjust to varying system and environmental conditions allows our customers to reduce inventories, simplify maintenance procedures, and shorten time-to-market,” he continued. “The ADCE itself significantly reduces the tedious characterization effort that is the result of high-speed systems having varying link characteristics across card slots.”

For more information, refer to the white paper “Digitally Assisted Adaptive Equalizer in 90 nm With Wide Range Support From 2.5 Gbps to 6.5 Gbps” by Wilson Wong, et al., Altera Corp., April 2007.

Altera Corp.
www.altera.com

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