In its latest incarnation, TestBencher Pro supports graphical code generation for the SystemC language. Version 7.2 of TestBencher Pro provides users with a graphical environment for generating cycle-based, bus-functional models from language-independent timing diagrams. It outputs all of the class code for interfacing to the SystemC simulator. SystemC is a powerful language for very high-level modeling of digital systems. Combined with TestBencher, users can rapidly examine system tradeoffs during the early stages of the design. In addition, the program supports sequence recognition, which allows a sequence of states to be defined for a timing diagram and have the generated trigger off that sequence when it occurs during simulation. This feature can be used to verify that the sequence has occurred, verify a set of timing requirements whenever the sequence occurs, or stimulate the design in a particular manner when the sequence occurs. Operating under Solaris/HP-UX and Windows NT, TestBencher Pro v7.2 has a starting price of $15,000.
Company: SYNAPTICAD INC.
Product URL: Click here for more information