Designed for applications requiring high-resolution digitization of high-frequency, wide-dynamic-range signals, the CSP1152A is a 14-bit, a/d converter featuring an internal sample-and-hold amplifier to provide top performance for direct IF sampling. The device can sample a 170-MHz IF at 65 MSPS and maintain a SFDR of greater than 83 dB for inputs of 1 dB or more below full scale. On-chip voltage reference circuitry provides all the required reference voltages for normal operation. A programmable master bias generator allows the power dissipation to be minimized for the desired performance and conversion rate. The digital outputs are buffered by low-glitch-energy, low-voltage differential signaling digital output buffers. These buffers can operate on supply voltages ranging from 2.7V to 5V. Devices are fabricated on a 0.35-µm, three-level-metal CMOS process and packaged in a 64-pin TQPF. Applications are in high-speed signal acquisition and cellular base stations.