Take what may be the oldest industrial-control signaling mode on the planet and update it to dynamically adapt itself to load impedance, and you can burn much less power and keep your controller much cooler. That’s what Analog Devices did in its AD5755 quad-channel, 16-bit industrial control digital-to-analog converter (DAC).
The datacom mode is the venerable current loop, a paragon of noise immunity for long, unshielded two-wire signal runs. And, yes, the AD5755 can directly accommodate a HART-modem (highway-addressable remote transducer) signal on its current output. (More on that later.)
Analog Devices replaced the old-fashioned current-loop driver (typically a simple 32-V voltage source) with a contemporary dc-dc switching converter that monitors the load current and adjusts the driver output between 7 and 30 V dc. Each of the device’s four output channels can also be programmed in voltage-output mode.
While they were updating the current-loop drive mode portion of the DAC, the company’s engineers in Limerick, Ireland, added a number of monitoring features requested by designers of industrial control systems, who face their own customers’ demands for larger and larger plants with ever finer-grained control along with the need to hold down energy usage.
The AD5755 is optimized for use with another cornerstone of industrial control, the programmable logic controller (PLC). PLCs use fast, deterministic functions, such as logic, sequencing, timing, counting, and arithmetic algorithms, to control machines and processes. To interface with valves and actuators, an input-output (I/O) controller handles the communication with multiple end nodes. This is where the AD5755 is used.
In an analog 4- to 20-mA current loop, 4 mA represents the low end of the range and 20 mA the high end. The advantage of the current loop is that voltage drops in the interconnecting wiring do not affect the accuracy of the signal. Also, the live zero represented by 4 mA allows the receiving instrument to detect some failures of the loop. It also allows the loop current to power two-wire-transmitter devices. That current can be converted to a voltage at any point in the loop by means of a series precision resistor as well.
Power dissipation concerns come into play because the termination resistance of the actuator determines the maximum compliance voltage needed across the loop. For example, a 100-‡ resistance would require at least 2 V at 20 mA. Today’s systems often must be able to drive loads of up to (and sometimes exceeding) 1 k‡.
With this load resistance, and a full-scale current of 20 mA, the supply would need to furnish at least 20 V and the power generated would be 0.4 W. If the load resistance were changed to 100 ‡, using the same supply (a valid condition), the power dissipated would still be 0.4 W, even though only 0.04 W would be needed. In this case there would be a 90% loss of efficiency in the system, with 360 mW being wasted in that one channel—and the trend is toward system controllers with more and more channels.
With an eight-channel module, the total power dissipation with a 20-V supply would be 3.2 W, of which as much as 2.88 W would be wasted in the module (if all loads are 100 ‡). In such cases, self-heating and the effect of the increased power budget become considerations. Increased temperatures within the module can lead to increased system errors, as the drift specs of the individual components need to be factored into the overall system error budget.
In the AD5755, when the dynamic power capability is enabled, the on-chip power dissipation is about 50 mW with output current of 24 mA versus 400 mW with no regulation. This ability to control the on-chip power dissipation is of great value to the system designer because the number of channels in the system can be increased while minimizing module dissipation. Thus, it eliminates the need to consider extensive (and expensive) methods to control system temperatures.
Dynamic power control uses an inductive boost circuit (see the figure). Each DAC output channel can provide a boosted output voltage greater than 30 V. The output voltage is divided down by a resistive voltage divider and compared to the reference voltage in an internal error amplifier to create an error current. The result controls the switching cycle ramp in the usual way. A similar scheme is used to regulate the output compliance voltage in current mode, except a feedback error current is used.
The chip designers at Analog Devices provided some further modern features in the AD5755. For example, the user has the option to switch the frequency and phase of each channel’s dc-dc converter switching signals to allow for circuit and component optimization.
The switching frequency programmability allows for system optimization and flexibility in choosing external components. (The AD5755 provides options of 333, 400, 500, and 667 kHz.) The ability to program the clock phase of the different DAC dc-dc converters provides further optimization capabilities. The four channels can be programmed in various patterns to trigger on the clock’s rising or falling edges or 90° out of phase with each other.
System Error Checking And Diagnostics
The AD5755’s on-chip diagnostic features provide the user with system-level error checking. One consideration is the default condition the system controller enters when a fault condition occurs. With no ability to control the output, the user would lose complete control of the system.
The chip’s watchdog timer (with programmable timeouts) sets an alert flag if it hasn’t received a command over the serial peripheral interface (SPI) within the timeout period. If desired, this ALERT pin can be directly connected to the clear pin to set the outputs into a known safe condition. Each channel on the AD5755 has a 16-bit programmable clear code register, giving the user flexibility to clear the output to any code.
For dealing with the possibility of corrupted input signals, the AD5755 has an optional packet error-checking (PEC) function that implements a CRC8 polynomial routine. This can be enabled or disabled through software to ensure that the output is never incorrectly updated.
The HART standard provides for digital two-way communication over current loops via a superimposed 1-mA peak-to-peak frequency-shift-keyed (FSK) signal. The AD5755 can be configured to transmit a HART signal with only two external components. According to the HART specification, the maximum rate of change of analog current can’t interfere with HART communications. Obviously, step changes in the current output can disrupt HART signaling. To deal with this, the AD5755 has a controllable slew rate.
The AD5755 is sampling now. Budgetary pricing in 1000-unit quantities is $13.35.