A Holistic Approach Can Pave The Way To Greater Power Efficiencies

A Holistic Approach Can Pave The Way To Greater Power Efficiencies

Engineers know that improvements in digital electronics and power electronics give us ever more efficient power supplies. Consumers know that energy efficiency is now an important consideration when choosing between products. For example, the market share for energy-efficient lighting in the U.K. is expected to grow from 36% of the overall lighting market in 2009 to 63% by 2014. 

Power-supply efficiency is therefore key to a well-designed product, but it’s not the only factor. Overall system efficiency is also very important. It’s typically the function of a complex tradeoff between a number of variables including power loss in various parts of the system under diverse operating conditions, system performance, cost, size, and even speed to market.

Improvements in digital electronics, particularly the trend toward tighter integration of more sophisticated peripherals such as analogue-to-digital converters (ADCs) and pulse-width modulation (PWM) in microcontrollers, can improve power efficiency and open up new product opportunities.

Consider the design of a power converter such as an electronic lighting ballast. Poorly designed power electronics in ballasts can lead to poor efficiency and reliability, and they can even require a physically larger product. Fluorescent ballasts are required to generate high-frequency ac (tens to hundreds of kilohertz) at high efficiencies and power densities. However, the switch-mode power converters used to achieve this can be limited by significant losses of energy in the switching elements themselves.

The Role Of The N-MOSFET

The most commonly used switching device is the N-MOSFET. While MOSFETs are improving all the time, they do carry some fundamental limitations when used at high frequencies and powers. To withstand a high dc voltage, the MOSFET requires a high drain-source breakdown voltage. Meanwhile, to provide a low on-state resistance, a large channel area is required.

Both of these requirements inevitably necessitate a physically larger gate, which in turn increases the resulting gate charge. A high gate charge becomes significant at high switching frequencies because it ultimately limits how quickly the devices can switch from off to on, opening the door for greater power loss or “switching losses.”

The Importance Of Circuit Topology

One way to improve a MOSFET’s performance and limit switching losses is to explore alternative power converter topologies. With the right topology, you can achieve greater performance with the same components. A particularly effective circuit topology that’s often used for power conversion is the resonant mode converter (Fig. 1).

The resonant mode converter uses a high-Q (quality factor) L-C resonance to couple the load to the power supply at a specific frequency. Changing the drive frequency can modulate the power-supply output, effectively ascending or descending the resonant peak of the L-C filter (Fig. 2).

That’s the advantage of using this topology. When the on resonance, current, and voltage are in phase, the MOSFETs then switch at the current zero-crossing point, significantly reducing switching losses.

In any real application, the total amount of acceptable loss is inevitably restricted by the amount of heat that can be dissipated within the physical implementation because the temperature of components or external surfaces must be limited. Since switching losses increase with frequency, an application will have a maximum power-frequency envelope.

For a given application, by lowering the switching losses, the resonant-mode circuit topology allows the maximum power-frequency envelope to be opened up (Fig. 3).
That’s why, among other reasons, resonant-mode circuit topologies are now well known.

However, there are limitations to their use. They are very effective at single-frequency or load point operation. But when it’s necessary to support a wide range of load conditions, efficiency can suffer and the switching losses can significantly increase.

Tight Software Integration

In these situations, adaptive control algorithms are important. Efficiency can be recovered whilst modulating power by, for example, using pulse-skipping algorithms.
In practice, making such algorithms work requires accurate sensing, a fast control loop, and tight integration between the software and the CPU peripherals.

Until recently, it has not been possible to realise such approaches other than by using a mixed-signal ASIC. The high development costs associated with it have traditionally ruled out this approach for all but the highest-volume applications. But in recent years, digital signal processing (DSP) instructions have crept into microcontrollers, and the array of on-chip peripherals has become more advanced.

Even lower-end microcontrollers now incorporate higher-end capabilities such as single-cycle multiply-accumulate (MAC) with pre-load (such as Microchip’s dsPIC series, Atmel’s AVR32U3 series, and Texas Instruments’ TMS320F28x Piccolo series) and are available in devices targeting the upper end of the power controller market.

These devices often include ADCs capable of simultaneous sampling at a rate of 1 million samples/second and can be configured to sample in synchronisation with the PWM output. Borrowing techniques that are well known to radio developers, this allows full in-phase and quadrature (I/Q) sampling of both voltage and current to calculate the “real” or “true” power delivered to the load, as well as the resistance, reactance, and phase (Fig. 4).

This tight integration even makes software phase-locked loops (PLLs) possible. A computationally demanding aspect of a PLL is working out the phase, which requires an arctan2 computation. But a 10-bit accurate arctan2 can be computed in just 1.5 µs on a dsPIC microchip.

PWM generation modules are also available with resolutions on the order of 1 ns, which allows direct control of the MOSFET switches of a power converter with a fine control over both duty cycle and frequency, even up to around 1 MHz. An on-chip clock source (itself derived via a PLL) can produce these capabilities with no need for external components.

These architectures are possible because of the tight integration of the peripherals and processor on a single device. An approach using separate devices for the microprocessor control and the waveform generation/control loop would not achieve the required performance because of the inevitable latency. 

The peripherals available in a $3 part today allow dynamic switching between different control regimens to maximise efficiency. Because the peripherals are on-chip and memory-mapped, very fast (i.e., tight) control loops can be implemented, leading to nearly optimal system performance.

The emergence of low-cost microcontrollers with high-end peripherals has lowered the barriers to high-efficiency power conversion with highly sophisticated control capability. This will undoubtedly open the door to a host of new solutions and support the macro-trend for new market-changing products with reduced size and increased portability.

To realise the size and efficiency benefits that a tightly integrated adaptive system can bring to their products, development engineers need to take a holistic approach to choosing the right control system and power conversion topology.

Resonant Topology In Action—A Real-World Example

Sagentia recently designed a medical product requiring ballast-like technology that was less than 1/1000 of the volume of the previous product generation. It was achieved with:

•           A resonant-mode topology
•           Latest-generation MOSFETs
•           A low-loss compact inductor and transformer
•           Taking full advantage of the on-chip ADCs
•           A PWM generation module with nanosecond accuracy
•           A synchronous in-phase and quadrature sampling engine

The cost and size reduction was so significant it became possible to replace capital equipment with single-use disposable electronics.

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