Electronic Design
Reconciling  Power-Factor  Correction  Standards  Leads To Solutions

Reconciling Power-Factor Correction Standards Leads To Solutions

There’s a tendency to think of energy on the power lines in terms of its fundamental 60- or 50-Hz frequency—the way the voltage is supposed to be created with the turbines and generators at the power house. Sure, the current lags the voltage if there’s a reactive load. That’s “power factor,” right? But isn’t it still a matter of “real” and reactive components at 50 or 60 Hz? Yes and no. Unfortunately, that conceptualization is a bit oversimplified.

In power distribution, power-factor correction (PFC) has traditionally been understood in terms of adding (in general) capacitive reactance at points in the power distribution system to offset the effect of an inductive load. One could say “reactive” load, but historically, power engineers have been most concerned with motors as loads when dealing with power factor. Correction could take the form of a bank of capacitors or a “synchronous condenser” (an unloaded synchronous motor).

More broadly, PFC can also be needed in any line-powered apparatus that uses ac-dc power conversion. These applications can range in scale from battery chargers for portable devices to big-screen TVs. Cumulatively, their input rectifiers are the largest contributor to mains-current harmonic distortion.

Where does that harmonic distortion come from? One common misconception is that switching regulators cause harmonic power-factor components. Actually, they’re produced in the typical full-bridge rectifier and its filter capacitor, aided and abetted by the impedance of the power line itself.

In the steady state, the supply draws current from the line when the input voltage exceeds the voltage on the filter capacitor. This creates a current waveform that includes all the odd harmonics of the power-line frequency (Fig. 1).

Once the voltage crosses that point, the current is only limited by the source impedance of the utility line as well as by the resistance of the diode that is forward-biased and the reactance of the capacitor that smoothes out the dc. As the power lines exhibit non-zero source impedance, the high current peaks cause some clipping distortion on the peaks of the voltage sinusoid.

Harmonics get to be considered elements of power factor because of their relationship to the power-line frequency. As Fourier components, they cumulatively represent an out-of phase current at the fundamental frequency. In fact, one broad definition of power factor is:

where THD is total harmonic distortion.

The Problem with Power Factor
Whatever the cause, what’s actually so wrong with power factors less than unity? Part of the problem is economic. Another part has to do with safety. Whatever their phase relationships, all those superposed harmonic currents create measurable I2R losses as they’re drawn from the generator, through miles of transmission and distribution lines, to the home or workplace.

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Historically, the utility ate the expense of the losses. At least for domestic consumers, the utility delivered volt-amperes, the consumer paid for watts, and the volt-amperes reactive (VARs) were a net loss. In fact, old mechanical power meters didn’t even record those currents, and in any event, tariffs for domestic consumers don’t permit charging for anything but “real” power.

That situation is likely to continue since “fixing” the tariffs is unlikely to appeal to state legislators. In any event, resolving the situation on an engineering level is more practical than socking it to Joe Homeowner.

That’s the economic side of the story. In terms of safety, if Joe’s home is an apartment, he has another reason to care. Harmonics, notably the third, can and do result in three-phase imbalance, with current flowing in the ground conductor in a “wye” (Y) configuration. The wye ground conductor typically isn’t sized to carry significant current.

PFC harmonics also cause losses and dielectric stresses in capacitors and cables, in addition to overcurrents in machine and transformer windings. For a more detailed analysis, see “PFC Strategies in light of EN 61000-3-2,” by Basu, et al.

REGULATING PF
Interestingly, mains power has been subject to interference from the beginning. The first regulatory effort to control disturbances to the electrical grid, the British Lighting Clauses Act of 1899, was intended to keep uncontrolled arc-lamps from making incandescent lamps flicker.

More recently (1978 and 1982), international standards IEC 555-2 “Harmonic injection into the AC Mains” and IEC 555-3 “Disturbances in supply systems caused by household appliances and similar electrical equipment - Part 3: Voltage fluctuations” were published. (Later they were updated to IEC1000 standards.)

Like those standards, the current standards come out of Europe, but they’re nearly universal. There are related government regulations for power-line harmonics in Japan, Australia, and China.

In the European Union, standard IEC/EN61000-3-2, “Electromagnetic compatibility (EMC) - Part 3-2 - Limits - Limits for harmonic current emissions (equipment input current ≤ 16 A per phase),” sets current limits up to the 39th harmonic for equipment with maximum power-supply specs from 75 to 600 W. Its “Class D” requirements (the strictest) apply to personal computers, computer monitors, and TV receivers. (Classes A, B, and C cover appliances, power tools, and lighting.)

What does the standard actually say? Under IEC 61000-3-2, the limits for Class D harmonic currents are laid down in terms of milliamps per watt consumed (Table 1).

GLOBAL DISHARMONY
Awkwardly, IEC61000-3-2, being a European-oriented standard, is based on 230-V single-phase and 230/400-V three-phase power at the wall-plug. In consequence, the current limits have to be adjusted for 120/240-V mains voltages in North America.

While IEC61000-3-2 sets mandatory standards for supplies sold in the EU, there are voluntary standards for North America. The U.S. Department of Energy’s Energy Star Computer Specification includes “80 Plus” power-supply requirements for desktop computers (later including servers) and laptops.

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80 Plus is a U.S./Canadian electric utility-funded rebate program that subsidizes the extra cost of computer power supplies that achieve 80% or higher efficiency at low mid-range and peak outputs, relative to the power rating on the nameplate, and that exhibit a power factor of at least 0.9. Within territories served by participating utilities, the utilities pay $5 or $10 for every desktop computer or server sold.

In 2008, the 80 Plus program was expanded to recognize higher-efficiency power supplies, initially using the Olympic medal colors of bronze, silver, and gold, and then adding platinum (Table 2). The new subcategories were meant to help expand program branding and to make it possible to offer larger consumer rebates for participating manufacturers that had moved ahead of the curve.

In Table 2, “redundant” refers to the practice of server systems makers of operating from a 230-V ac source and using multiple supplies to deliver power to the load. Some systems may have up to six power supplies so if one fails, the others can absorb the failed unit’s share of load.

BELOW 20% LOAD
One complaint about 80 Plus is that it does not set efficiency targets for very low load levels. This may seem like a trivial objection, but it isn’t when there are large numbers of computers in operations such as server farms, many of which may be in a standby or sleep mode at any given time. Ironically, the processor’s power-saving modes tend to conflict with efforts to save power in the ac supply.

Of some further significance may be the conflict between specifying requirements for the individual components of harmonic distortion, as IEC 61000-3-2 does, and specifying a single value, such as 0.9 for power factor, as the higher levels of 80 Plus do.

Texas Instruments provides an interesting analysis of the issues in a white paper, “High Power Factor and High Efficiency – You Can Have Both,” by Isaac Cohen and Bing Lu. Early in the paper, the authors calculate the power factor represented by the Class D harmonic levels specified by IED61000-3-2, Class D. Making a few simplifications, the expression for power factor reduces to:

Since 0.726 is significantly less than 0.9, a supply that just meets the minimum requirement for the EU standard will fail Energy Star.

Just to make things interesting, the TI authors note that based on the basic definition of power factor as the ratio of the average power in watts absorbed by a load from a voltage or current source to the product of RMS voltage appearing across the load and the RMS current flowing in it, it is theoretically possible to design a simple full-wave bridge and drive it with a square wave and have it meet the 0.9 power-factor Energy Star requirement by “emulating an inductive-input filter with a large inductance value.” (See the white paper for details.) Nonetheless, a Fourier analysis of the square wave shows that all harmonics above the 11th exceed the IEC61000-3-2 limits.

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Ultimately, as the title of the paper suggests, the problem is a chimera. “Fortuitously, all the commonly used active-PFC circuits draw input-current waveforms that can easily comply \\[with\\] both standards,” the authors say.

Like Texas Instruments, ON Semiconductor has addressed the issues of reconciliation. In a communication available online, “Comments on Draft 1 Version 2.0 Energy Star Requirements for External Power Supplies (EPS)”, the company advised the Department of Energy that external power supplies that meet the IEC61000-3-2 typically have a power factor of 0.85 or greater when measured at 100% of rated output power.

“More specifically, at 100% of rated output power and 230-V ac line, two-stage external power supplies with an active-PFC front end exhibit a power factor greater than 0.9,” the paper explains. “The opposite is however not true, i.e. it is entirely possible that an external power supply can exhibit a power factor of 0.9 and yet will fail a given odd harmonic current and therefore will not meet the IEC61000-3-2.”

Another issue with stating a PFC requirement directly, rather than in terms of individual harmonics, has to do with design efficiency. For a single-stage PFC topology to meet the proposed power-factor specification at 230-V ac line, ON Semiconductor says, the necessary circuit modifications would result in a few-percent efficiency loss and in a substantially increased cost.

“For single-stage external power supplies the power factor is typically greater than 0.80. The proposed power-factor requirement would eliminate the single-stage topology that is one of the most cost-effective ways of building highly efficient external power supplies such as notebook adapters with a nameplate output power below 150 W,” ON Semiconductor says.

Note the emphasis on single-stage. It opens the door to an interesting design question represented by TI and ON Semi. To understand it, let’s first look at actual PFC design approaches.

APPROACHES TO UNITY POWER FACTOR
Since the discontinuous input-filter charging current creates the low power factor in switch-mode power supplies, the cure is to increase the rectifier’s conduction angle. Solutions include passive and active PFC and passive or active filtering.

Passive PFC involves an inductor on the power-supply input. Passive PFC looks simple, but isn’t really practical for reasons that include the necessary inductance, conduction losses, and possibility of resonance with the output filter capacitor.

As noted above, the power-factor problem in ac-input switch-mode power supplies arises because current is drawn from the line only during parts of the ac-supply voltage waveform that rise above the dc voltage on the bulk storage (filter) capacitor(s). This non-symmetrical current draw introduces harmonics of the ac line voltage on the line.

The basic PFC concept (Fig. 2) is fairly simple. A control circuit switches a MOSFET to draw current through an inductor in a way that fills in the gaps that would otherwise represent harmonics.

The PFC controller can be designed to operate in several modes: critical conduction mode (also called transition mode), and continuous conduction mode (CCM). The differences lie in how fast the MOSFET switches, which in turn determines whether the inductor current (and the energy in the inductor) approaches zero or remains relatively high.

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The terms “critical” and “transition” reflect the fact that each time the current approaches 0 A, the inductor is at a point where its energy approaches zero. Transition-mode operation can achieve power factors of 0.9. However, it is limited to lower power levels, typically 600 W and below. It is economical, because it uses relatively few components. Applications include lighting ballasts and LED lighting, as well as consumer electronics.

The circuit topology for CCM is like critical conduction mode. But unlike the simpler mode, its ripple current has a much lower peak-to-peak amplitude and does not go to 0 A. The inductor always has current flowing through it and does not dump all of its energy at each pulse-width modulation (PWM) cycle, hence the term “continuous.”

In this case, the average current produces a higher-quality composite of the ac line current, making it possible to achieve power factors near unity. This is important at higher power levels as the higher currents magnify radiated and conducted electromagnetic interference (EMI) levels that critical conduction mode would have difficulty meeting.

PFC CONTROLLER DESIGNS
TI has an interesting solution for this, embodied in its UCC28070 two-phase interleaved continuous-current mode PFC controller (Fig. 4). The UCC28070 targets 300-W to multi-kilowatt power supplies, such as what might be used in telecom rectifiers or server front ends.

The idea behind the design of the TI chip is that for higher power levels, it is possible to parallel two PFC stages to deliver higher power. This also has thermal-management advantages, since heat losses from the two stages are spread over a wider area of the circuit board. The disadvantage of simple parallel operation is higher input and output ripple currents.

TI says that a better alternative is to interleave the two stages so their currents are 180° out of phase. That way, the ripple currents cancel. In fact, designs with more than two phases (Fig. 3) are common. In those cases, the phase angles are distributed evenly. In multiphase PFC, due to the lower output ripple currents, the number or physical size of the passive components can be smaller than in single-phase PFC, providing cost, space, and EMI-filter complexity tradeoffs.

The application often drives PFC controller design. For example, ON Semiconductor’s NCL30001 LED lighting controller, which is intended for 12-V and higher LED lighting applications between 40 and 150 W, combines CCM PFC and a flyback step-down converter (Fig. 5).

While a typical LED lighting power supply might consist of a boost PFC stage that powers a 400-V bus followed by an isolated dc-dc converter, the NCL30001 datasheet describes a simpler approach that shrinks the front-end converter (ON Semi calls it the PFC preregulator) and the dc-dc converter into a single power-processing stage with fewer components. It essentially needs only one MOSFET, one magnetic element, one low-voltage output rectifier, and one low-voltage output capacitor.

ON Semiconductor’s datasheet provides an instructive description of the portion of the circuit shown in Figure 5. The output of a reference generator is a rectified version of the input sine wave proportional to the feedback (FB) and inversely proportional to the feedforward (VFF) values. An ac error amp forces the average current output of the current-sense amplifier to match the reference-generator output. This output (VERROR) drives the PWM comparator through a reference buffer, and the PWM comparator sums VERROR and the instantaneous current and compares the result to a 4.0-V threshold. Suitably compensated, this provides the duty-cycle control.

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